mfr4300 Freescale Semiconductor, Inc, mfr4300 Datasheet - Page 224

• Manufacturer Part Number: mfr4300
• Description: Flexray Communication Controllers
• Manufacturer: Freescale Semiconductor, Inc

Clocks and Reset Generator (CRG)
6.4.1.1
When the power-on reset signal is asserted the CRG asserts the system reset signal. The CRG will deassert
synchronously the system reset signal approximately 16420 EXTAL/CLK_CC clock periods after the
deassertion of the power-on reset signal.
The CRG asserts the INT_CC# interrupt line and the power-on reset interrupt flag, CRSR.PRIF, on the
rising edge of the power-on reset signal.
Figure 6-3
224
Low voltage or Clock Monitor Failure (if enabled) Reset
illustrates the power-on reset situation.
Power-on Reset
Once the CRG had started a reset procedure it will not abandon it unless a
reset event with more priority was detected. The reset procedure which has
the same priority, as currently running one, stops the previous procedure and
gets executed.
The CRG deasserts the INT_CC# signal when CRSR.PRIF, CRSR.LVIF,
CRSR.CMIF and CRSR.ERIF bits are “0“.
Power-on Reset
External Reset
Reset Source
Table 6-4. CRG Reset Sources Priorities
MFR4300 Data Sheet, Rev. 3
NOTE
NOTE
Block to Reset
Whole device
Whole device
Whole device
Priority
High
Low
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