mfr4300 Freescale Semiconductor, Inc, mfr4300 Datasheet - Page 134

• Manufacturer Part Number: mfr4300
• Description: Flexray Communication Controllers
• Manufacturer: Freescale Semiconductor, Inc

FlexRay Module (FLEXRAYV2)
Specification, Version 2.1. A detailed description of the usage and the content of the frame header is
provided in
3.4.2.1.2
The data field offset follows the frame header in the message buffer data field and occupies two bytes. It
contains the offset of the corresponding message buffer data field with respect to the FlexRay module FRM
base address 0x800. The data field offset is used to determine the start address
corresponding message buffer data field in the FRM according to
3.4.2.1.3
The slot status occupies the last two bytes of the message buffer header field. It provides the slot and frame
status related information according to the FlexRay Communications System Protocol Specification,
Version 2.1. A detailed description of the content and usage of the slot status is provided in
Section 3.4.5.2.3, “Slot Status
3.4.2.2
The message buffer data field is a contiguous area of 2-byte entities. This field contains the frame payload
data, or a part of it, of the frame to be transmitted to or received from the FlexRay bus. The minimum
length of this field depends on the specific message buffer configuration and is specified in the message
buffer descriptions given in
3.4.3
The FlexRay module provides three different types of message buffers.
For each message buffer type the structure of the physical message buffer is identical. The message buffer
types differ only in the structure and content of message buffer control data, which control the related
physical message buffer. The message buffer control data are described in the following sections.
3.4.3.1
The individual message buffers are used for all types of frame transmission and for dedicated frame
reception based on individual filter settings for each message buffer. The FlexRay module supports three
types of individual message buffers, which are described in
Functional
Each individual message buffer consists of two parts, the physical message buffer, which is located in the
FRM, and the message buffer control data, which are located in dedicated registers. The structure of an
individual message buffer is given in
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Individual Message Buffers
Receive Shadow Buffers
Receive FIFO Buffers
Description”.
Section 3.4.5.2.1, “Frame Header Section
Message Buffer Types
Message Buffer Data Field
Individual Message Buffers
Data Field Offset
Slot Status
Section 3.4.3, “Message Buffer
SADR_MBDF = [Data Field Offset] + 0x800
Description”.
Figure
MFR4300 Data Sheet, Rev. 3
3-98.
Description”.
Section 3.4.6, “Individual Message Buffer
Types”.
Equation
3-1.
SADR_MBDF
Freescale Semiconductor
of the
Eqn. 3-1