mfr4300 Freescale Semiconductor, Inc, mfr4300 Datasheet - Page 226

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mfr4300

Manufacturer Part Number
mfr4300
Description
Flexray Communication Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Clocks and Reset Generator (CRG)
6.4.1.3
When the RESET# signal is asserted the CRG asserts the system reset signal. The CRG will deassert the
system reset signal approximately 70 EXTAL/CLK_CC clock periods after the deassertion of the RESET#.
The CRG asserts the INT_CC# interrupt line and the external reset interrupt flag, CRSR.ERIF, on the
assertion of the RESET# signal.
Figure 6-6
226
clock monitor failure
(if enabled)
illustrates an external reset scheme.
low voltage reset
External Reset
The CRG deasserts the INT_CC# signal when CRSR.PRIF, CRSR.LVIF,
CRSR.CMIF and CRSR.ERIF bits are “0“.
system reset
system reset
CRSR.LVIF
CRSR.CMIF
INT_CC#
INT_CC#
Figure 6-5. Clock Monitor Failure Reset
Figure 6-4. Low Voltage Reset
MFR4300 Data Sheet, Rev. 3
~16420 EXTAL/CLK_CC periods
~16420 EXTAL/CLK_CC periods
NOTE
Freescale Semiconductor

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