lrs1338a Sharp Microelectronics of the Americas, lrs1338a Datasheet - Page 20

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lrs1338a

Manufacturer Part Number
lrs1338a
Description
Stacked Chip Flash Memory Sram
Manufacturer
Sharp Microelectronics of the Americas
Datasheet
LRS1338A
Electrical Specifications
ABSOLUTE MAXIMUM RATINGS
• Commercial Operating Temperature
• Storage Temperature: -65°C to +125°C
• Voltage on any pin except V
• V
• V
• RP Voltage: -2.0 V to +14.0 V (Note 2 and 3)
• Output Short Circuit Current: 100 mA (Note 4)
WARNING: *Stressing the device beyond the ‘Absolute Maximum
Ratings’ may cause permanent damage. These are stress ratings
only. Operation beyond the ‘Operating Conditions’ is not recom-
mended and extended exposure beyond the ‘Operating Conditions’
may affect device reliability.
NOTES:
1. Operating temperature is for commercial product defined by this
2. All specified voltages are with respect to GND. Minimum DC volt-
3. Maximum DC voltage on V
4. Output shorted for no more than one second. No more than one
20
-2.0 V to +7.0 V (Note 2)
Write: -2.0 V to +14.0 V (Note 2 and 3)
– During Read, Block Erase and Word Write:
– Temperature under Bias: -40°C to +85°C (Note 1)
specification.
age is -0.5 V on input/output pins and -0.2 V on V
During transitions, this level may undershoot to -2.0 V for periods
< 20 ns. Maximum DC voltage on input/output pins and V
+ 0.5 V which, during transitions, may overshoot to V
periods < 20 ns.
for periods <20 ns.
output shorted at a time.
CC
PP
-40°C to +85°C (Note 1)
Supply Voltage: -2.0 V to +7.0 V (Note 2)
Update Voltage during Block Erase and Word
PP
and RP may overshoot to +14.0 V
CC
, V
*
PP
and RP:
CC
and V
CC
+ 2.0 V for
CC
PP
is V
pins.
CC
AC Test Conditions
NOTE: AC test inputs are driven at 2.7 V for a Logic '1' and 0.0 V
TEST CONFIGURATION
NOTE: C
2.7
0.0
INPUT
Figure 10. Transient Input/Output Reference
V
CC
for a Logic '0'. Input timing begins and output timing ends
at 1.35 V. Input rise and fall times (10% to 90%) < 10 ns.
= 2.7 V to 3.6 V
1.35
L
Waveform for V
Includes Jig Capacitance
Figure 11. Transient Equivalent
Table 10. Test Configuration
Capacitance Loading Value
DEVICE
UNDER
Stacked Chip (8M Flash & 2M SRAM)
TEST
Testing Load Circuit
TEST POINTS
CC
1.3 V
= 2.7 V to 3.6 V
R
C
1N914
L
L
= 3.3 k
C
OUT
L
50
(pF)
1.35
Data Sheet
LRS1338A-10
LRS1338A-11
OUTPUT

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