lrs1338a Sharp Microelectronics of the Americas, lrs1338a Datasheet - Page 18

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lrs1338a

Manufacturer Part Number
lrs1338a
Description
Stacked Chip Flash Memory Sram
Manufacturer
Sharp Microelectronics of the Americas
Datasheet
LRS1338A
SR.7 = Write State Machine Status (WSMS)
SR.6 = Erase Suspend Status (ESS)
SR.5 = Erase(s)
SR.4 = Word Write (WWS)
SR.3 = V
SR.2 = Word Write Suspend Status (WWSS)
SR.1 = Device Protect Status (DPS)
SR.0 = Reserved for future enhancements (R)
18
1 = Ready
0 = Busy
1 = Block Erase Suspended
0 = Block Erase in Progress/Completed
1 = Error in Block Erasure
0 = Successful Block Erase
1 = Error in Word Write
0 = Successful Word Write
1 = V
0 = V
1 = Word Write Suspended
0 = Word Write in Progress/Completed
1 = WP and/or RP Lock Detected, Operation Abort
0 = Unlock
WSMS
7
PP
PP
PP
Status (VPPS)
LOW Detect, Operation Abort
Okay
ESS
Word Write or
OPERATION
6
Block Erase
ES
5
Table 8. Write Protection Alternatives
> V
Table 9. Status Register Definition
V
V
PPLK
PP
IL
WWS
4
V
V
RP
V
X
HH
IH
IL
NOTES:
1. Check SR.7 to determine block erase or word write completion.
2. If both SR.5 and SR.4 are ‘1’s after a block erase attempt, an
3. SR.3 does not provide a continuous indication of V
4. The WSM interrogates the WP and RP only after Block Erase or
5. SR.0 is reserved for future use and should be masked out when
VPPS
WP
V
V
SR.6 - SR.0 are invalid while SR.7 = 0.
improper command sequence was entered.
WSM interrogates and indicates the V
Erase or Word Write command sequences. SR.3 is not guaran-
teed to report accurate feedback only when V
Word Write command sequences. It informs the system, depending
on the attempted operation, if the WP is not V
polling the status register.
X
X
X
IH
3
IL
All blocks locked
All blocks locked
All blocks unlocked
Two boot blocks locked
All blocks unlocked
Stacked Chip (8M Flash & 2M SRAM)
WWSS
2
EFFECT
DPS
1
PP
level only after Block
IH
PP
or RP is not V
Data Sheet
V
PP
PPH
level. The
R
0
.
HH
.

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