lrs1338a Sharp Microelectronics of the Americas, lrs1338a Datasheet - Page 13
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lrs1338a
Manufacturer Part Number
lrs1338a
Description
Stacked Chip Flash Memory Sram
Manufacturer
Sharp Microelectronics of the Americas
Datasheet
1.LRS1338A.pdf
(36 pages)
Stacked Chip (8M Flash & 2M SRAM)
Data Sheet
FULL STATUS CHECK PROCEDURE
Check If Desired
Status Register
Block Address
Block Address
Read Status Register
Block Erase
Full Status
Write D0H
Data (See Above)
Write 20H
Complete
SR.7 =
Read
Block Erase
Start
Successful
SR.4, 5 =
SR.3 =
SR.1 =
SR.5 =
1
0
0
0
0
0
1
1
1
1
Suspend
Erase
Sequence Error
Block
Protect Error
Range Error
Erase Error
Command
No
Device
Block
V
PP
Suspend Block
Figure 6. Automated Block Erase Flowchart
Yes
Erase Loop
OPERATION
SR.5, SR.4, SR.3, and SR.1 are only cleared by the Clear Status
Register Command in cases where multiple blocks are erased before
full status is checked.
If error is detected, clear the Status Register before attempting
retry or other error recovery.
Standby
Standby
Standby
Standby
OPERATION
Repeat for subsequent block erasures.
Full status check can be done after each block erase
or after a sequence of block erasures.
Write FFH after the last operation to place device in read array mode.
BUS
Standby
Write
Write
Read
BUS
COMMAND
Erase Setup
COMMAND
Confirm
Erase
Check SR.3
1 = V
Check SR.1
1 = Device Protect Detect
Check SR.4, 5
Both 1 = Command Sequence Error
Check SR.5
1 = Block Erase Error
Data = 20H
Addr = Within Block to be Erased
Data = D0H
Addr = Within Block to be Erased
Status Register Data
Check SR.7
1 = WSM Ready
0 = WSM Busy
PP
Error Detect
COMMENTS
COMMENTS
LRS1338A
LRS1338A-6
13