mt90520 Zarlink Semiconductor, mt90520 Datasheet - Page 50

• Manufacturer Part Number: mt90520
• Description: 8-port Primary Rate Circuit Emulation Aal1 Sar
• Manufacturer: Zarlink Semiconductor

4.4.1
4.4.1.1
TX UTOPIA Interface
The TX UTOPIA Interface’s primary function is to transmit ATM cells to devices outside the MT90520 chip,
according to the ATM Forum’s Level 2 UTOPIA specification. The port can operate in either ATM or PHY mode.
When the port is operating in ATM mode, it complies with the transmit portion of the ATM Forum specification; when
operating in PHY mode, it complies with the receive portion of the specification. Additionally, when operating in PHY
UTO_OUT_ENBATM_CLAVPHY
UTO_OUT_CLAVATM_ENBPHY
UTO_IN_ENBATM_CLAVPHY
UTO_IN_CLAVATM_ENBPHY
UTO_OUT_DATA[15:0]
Functional Description
UTO_OUT_ADD[4:0]
UTO_IN_DATA[15:0]
Segmentation Direction
UTO_IN_ADD[4:0]
UTO_OUT_SOC
UTO_OUT_PAR
UTO_OUT_CLK
UTO_IN_SOC
UTO_IN_PAR
UTO_IN_CLK
RX UTOPIA
TX UTOPIA
RX Parity
TX Parity
Interface
Interface
Figure 15 - UTOPIA Block Diagram
Zarlink Semiconductor Inc.
MT90520
VPI/VCI
OAM &
External ZBT SRAM
Filter
50
(32 cells)
UTOPIA
FIFO
RX
UTOPIA
(8 cells)
FIFO
TX
Filtering process
UTOPIA Module
Comparison or
UDT VCI/VPI
VC Look-Up
LUT Filter
Table
MT90520
Data Sheet
RX_SAR
TX_SAR
SDT or
(UDT,
Data)