mt90520 Zarlink Semiconductor, mt90520 Datasheet - Page 112

• Manufacturer Part Number: mt90520
• Description: 8-port Primary Rate Circuit Emulation Aal1 Sar
• Manufacturer: Zarlink Semiconductor

6.0
This section describes the registers contained within the MT90520. The MT90520 is mapped over 1 Mbyte of
internal address space. The first 512 Kbytes of address space are allocated for internal register use, while the latter
half of address space contains internal memory blocks within the MT90520. As shown in Table 25 on page 113, the
device does not implement all of the register space available inside the chip. The unused address space is
reserved for future variants of the device.
The internal registers are used by the following modules within the device:
All registers are 16 bits long. The device only allows 16-bit (word) microprocessor accesses; byte access is not
supported. However, the addresses given in the following tables are given as byte addresses.
All register addresses and reset values are listed in hexadecimal (Hex) format.
The register bit types are:
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Microprocessor Interface
TX_SAR
RX_SARs (UDT, Data, and SDT)
Reassembly-Side Timeout
UTOPIA Interface
Clock Management
TDM Interface
External Memory Interface
Read / Write (R/W) - can be read or written via the microprocessor interface.
Read Only Latched (R/O/L) - these bits are set by an activated status source (e.g., counter rollover)
within the chip; once set, they remain set even if the status source is deactivated. The microprocessor
can read an R/O/L bit and clear it by writing a logic ‘0’ into it (as long as the status source is not active).
Writing logic ‘1’ has no effect on this type of register bit.
Read Only (R/O) - can be read via the microprocessor interface. A write to this type of register bit is
ignored by the chip. However, these bits should be written with ‘0’ to ensure software compatibility with
future versions of the MT90520.
Registers
Zarlink Semiconductor Inc.
MT90520
112
Data Sheet