wm8192cdw-v Wolfson Microelectronics plc, wm8192cdw-v Datasheet
wm8192cdw-v
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wm8192cdw-v Summary of contents
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... DVDD1 DVDD2 VRX VRB VRT VREF/BIAS + I/P SIGNAL POLARITY ADJUST DATA I/O M 16- PORT + U BIT X ADC I/P SIGNAL POLARITY ADJUST + I/P SIGNAL POLARITY CONFIGURABLE ADJUST SERIAL CONTROL INTERFACE DGND Production Data, July 2004, Rev 4.1 Copyright 2004 Wolfson Microelectronics plc OEB OP[0] OP[1] OP[2] OP[3] OP[4] OP[5] OP[6] OP[7]/SDO SEN SCK SDI RLC/ACYC ...
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WM8192 DESCRIPTION .......................................................................................................1 FEATURES.............................................................................................................1 APPLICATIONS .....................................................................................................1 BLOCK DIAGRAM .................................................................................................1 TABLE OF CONTENTS .........................................................................................2 PIN CONFIGURATION...........................................................................................3 ORDERING INFORMATION ..................................................................................3 PIN DESCRIPTION ................................................................................................4 ABSOLUTE MAXIMUM RATINGS.........................................................................5 RECOMMENDED OPERATING CONDITIONS .....................................................5 ELECTRICAL CHARACTERISTICS ......................................................................6 INPUT VIDEO SAMPLING ............................................................................................. 8 OUTPUT DATA TIMING ................................................................................................ ...
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... PIN CONFIGURATION RINP 1 AGND2 2 DVDD1 3 OEB 4 VSMP 5 RLC/ACYC 6 MCLK 7 DGND 8 SEN 9 DVDD2 10 SDI 11 SCK 12 OP[0] 13 OP[1] 14 ORDERING INFORMATION TEMPERATURE DEVICE RANGE WM8192CDW WM8192CDW/ Note: Reel quantity = 500 w 28 GINP 27 BINP 26 VRLC/VBIAS 25 VRX 24 VRT 23 VRB 22 AGND1 21 AVDD 20 OP[7]/SDO 19 OP[6] 18 OP[5] 17 OP[4] 16 OP[3] 15 OP[2] PACKAGE o ...
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WM8192 PIN DESCRIPTION PIN NAME TYPE 1 RINP Analogue input 2 AGND2 Supply 3 DVDD1 Supply 4 OEB Digital input 5 VSMP Digital input 6 RLC/ACYC Digital input 7 MCLK Digital input 8 DGND Supply 9 SEN Digital input 10 ...
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WM8192 ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics ...
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WM8192 ELECTRICAL CHARACTERISTICS Test Conditions AVDD = DVDD1 = 5.0V, DVDD2 = 3.3V, AGND = DGND = 0V, T PARAMETER Overall System Specification (including 16-bit ADC, PGA, Offset and CDS functions) Conversion rate Full-scale input voltage range (see Note 1) ...
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WM8192 Test Conditions AVDD = DVDD1 = 5.0V, DVDD2 = 3.3V, AGND = DGND = 0V, T PARAMETER Programmable Gain Amplifier Resolution Gain Max gain, each channel Min gain, each channel Gain error, each channel Analogue to Digital Converter Resolution ...
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WM8192 INPUT VIDEO SAMPLING t MCLK t VSMPSU VSMP INPUT VIDEO Figure 1 Input Video Timing Note: 1. See Page 14 (Programmable VSMP Detect Circuit) for video sampling description. Test Conditions AVDD = DVDD1 = 5.0V, DVDD2 = 3.3V, AGND ...
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WM8192 OEB OP[7:0] Hi-Z Figure 3 Output Data Enable Timing Test Conditions AVDD = DVDD1 = 5.0V, DVDD2 = 3.3V, AGND = DGND = 0V, T PARAMETER Output propagation delay Output enable time Output disable time MCLK t ACYCSU RLC/ACYC ...
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WM8192 Test Conditions AVDD = DVDD1 = 5.0V, DVDD2 = 3.3V, AGND = DGND = 0V, T PARAMETER SCK period SCK high SCK low SDI set-up time SDI hold time SCK to SEN set-up time SEN to SCK set-up time ...
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WM8192 DEVICE DESCRIPTION INTRODUCTION A block diagram of the device showing the signal path is presented on Page 1. The WM8192 samples up to three inputs (RINP, GINP and BINP) simultaneously. The device then processes the sampled video signal with ...
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WM8192 EXTERNAL VRLC Figure 6 Reset Level Clamping and CDS Circuitry If auto-cycling is not required, RLC can be selected by pin RLC/ACYC. Figure 7 illustrates control of RLC for a typical CCD waveform, with CL applied during the reset ...
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WM8192 R /CL (CDSREF = 00 /CL (CDSREF = 01 /CL (CDSREF = 10 /CL (CDSREF = 11) S Figure 8 Reset Sample and Clamp Timing For CIS type sensor signals, non-CDS processing is ...
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WM8192 OVERALL SIGNAL FLOW SUMMARY Figure 11 represents the processing of the video signal through the WM8192 RESET V VRLC RLCEXT=1 Figure 11 Overall Signal Flow The INPUT SAMPLING BLOCK produces an effective input voltage V difference ...
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WM8192 OFFSET DAC BLOCK: OFFSET (BLACK-LEVEL) ADJUST The resultant signal V PGA NODE: GAIN ADJUST The signal is then multiplied by the PGA gain, ADC BLOCK: ANALOGUE-DIGITAL CONVERSION The analogue signal is then converted to a 16-bit unsigned number, with ...
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WM8192 CONTROL INTERFACE The internal control registers are programmable via the serial digital control interface. The register contents can be read back via the serial interface on pin OP[7]/SDO. Note recommended that a software reset is carried out ...
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WM8192 PROGRAMMABLE VSMP DETECT CIRCUIT The VSMP input is used to determine the sampling point and frequency of the WM8192. Under normal operation a pulse of 1 MCLK period should be applied to VSMP at the desired sampling frequency (as ...
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WM8192 POWER MANAGEMENT Power management for the device is performed via the Control Interface. The device can be powered on or off completely by setting the EN bit and SELD bit low. Alternatively, when control bit SELPD is high, only ...
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WM8192 OPERATING MODES Table 4 summarises the most commonly used modes, the clock waveforms required and the register contents required for CDS and non-CDS operation. MODE DESCRIPTION CDS AVAILABLE 1 Colour Yes Pixel-by-Pixel 2 Monochrome/ Yes Colour Line-by-Line 3 Fast ...
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WM8192 OPERATING MODE TIMING DIAGRAMS The following diagrams show 8-bit multiplexed output data and MCLK, VSMP and input video requirements for operation of the most commonly used modes as shown in Table 4. The diagrams are identical for both CDS ...
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WM8192 Figure 20 Mode 3 Operation Figure 21 Mode 4 Operation w Production Data PD Rev 4.1 July2004 21 ...
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WM8192 MCLK VSMP INPUT VIDEO OP[7: (DEL = 00) OP[7: (DEL = 01) OP[7: ...
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WM8192 DEVICE CONFIGURATION REGISTER MAP The following table describes the location of each control bit used to determine the operation of the WM8192. The register map is programmed by writing the required codes to the appropriate addresses via the serial ...
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WM8192 REGISTER MAP DESCRIPTION The following table describes the function of each of the control bits shown in Table 5. REGISTER BIT BIT NO NAME(S) Setup 0 EN Register 1 1 CDS 2 MONO 3 SELPD 5:4 PGAFS[1:0] 6 MODE4 ...
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WM8192 REGISTER BIT BIT NO NAME(S) Setup 0 LINEBYLINE Register 4 1 ACYCNRLC 2 FME 3 RLCINT 5:4 INTM[1:0] 7:6 FM[1:0] Setup 0 VSMPDET Register 5 3:1 VDEL[2:0] 4 POSNNEG Setup 3:0 SELDIS[3:0] Register 6 w DEFAULT 0 Selects line ...
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WM8192 REGISTER BIT BIT NO NAME(S) Offset DAC 7:0 DAC[7:0] (Red) Offset DAC 7:0 DAC[7:0] (Green) Offset DAC 7:0 DAC[7:0] (Blue) Offset DAC 7:0 DAC[7:0] (RGB) PGA gain 7:0 PGA[7:0] (Red) PGA gain 7:0 PGA[7:0] (Green) PGA gain 7:0 PGA[7:0] ...
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WM8192 APPLICATIONS INFORMATION RECOMMENDED EXTERNAL COMPONENTS DVDD1 DVDD2 C1 C2 AVDD DGND AGND Video Inputs AGND Timing Signals Interface Controls NOTES: 1. C1-9 should be fitted as close to WM8192 as possible. 2. AGND and DGND should be connected as ...
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WM8192 PACKAGE DIMENSIONS D: 28 PIN SOICW 7.5mm (0.3") Wide Body, 1.27mm Lead Pitch ZONE A ZONE Dimensions Symbols (mm) MIN MAX A 2.35 2.65 A 0.10 0. 0.33 0.51 C ...
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... WM8192 IMPORTANT NOTICE Wolfson Microelectronics plc (WM) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current. All products are sold subject to the WM terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability ...