ak4648 AKM Semiconductor, Inc., ak4648 Datasheet - Page 67

• Manufacturer Part Number: ak4648
• Description: Stereo Codec With Mic/hp/spk-amp
• Manufacturer: AKM Semiconductor, Inc.

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When LODIF bit = “1”, LOUT/ROUT pins become LOP/LON pins, respectively. Lch/Rch signal of DAC or
LIN2/RIN2/LIN3/RIN3/LIN4/RIN4 is output from the LOP/LON pins which is full-differential as (L+R)/2 signal. The
load impedance is 10k Ω (min.) for LOP and LON pins, respectively. When the PMLO bit = “0”, the mono line output
enters power-down mode and the output is Hi-Z. When the PMLO bit is “1” and LOPS bit is “1”, mono line output enters
power-save mode. Pop noise at power-up/down can be reduced by changing PMLO bit at LOPS bit = “0”. When PMLO
bit = “1” and LOPS bit = “0”, mono line output enters in normal operation. LOVL bit set the gain of mono line output.
When L4DIF=LODIF bits = “1”, full-differential output signal is as follows: (LOP) − (LON) = (IN4+) − (IN4 − ).
MS0625-E-01
Full-differential Mono Line Output (LOP/LON pins)
PMLO
0
1
LON pin
PMLO bit
LOP pin
LOPS bit
Hi-Z
LOPS
Figure 49. Power-up/Power-down Timing for Mono Line Output
LOVL
x
1
0
0
1
Table 56. Mono Line Output Mode Setting (x: Don’t care)
Hi-Z
VCOM
DAC
Table 57. Mono Line Output Volume Setting
Normal Operation
+6dB
+8dB
Gain
Power-down
Power-save
Figure 48. Mono Line Output
Mode
DACL bit
Output Voltage (typ.)
- 67 -
1.2 x AVDD
1.5 x AVDD
Normal Operation
LOVL bit
Hi-Z
Hi-Z
LOP
(default)
Normal Operation
LOP pin
LON pin
VCOM
LON
Hi-Z
VCOM
Hi-Z
Hi-Z
(default)
[AK4648]
2007/06