ak4648 AKM Semiconductor, Inc., ak4648 Datasheet - Page 115

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ak4648

Manufacturer Part Number
ak4648
Description
Stereo Codec With Mic/hp/spk-amp
Manufacturer
AKM Semiconductor, Inc.
Datasheet

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Master clock can be stopped when ADC and DAC are not used.
1. PLL Master Mode
2. PLL Slave Mode (LRCK or BICK pin)
3. PLL Slave (MCKI pin)
MS0625-E-01
External LRCK
External MCKI
External MCKI
External BICK
(Addr:01H, D0)
(Addr:01H, D1)
(Addr:01H, D0)
(Addr:01H, D0)
(Addr:01H, D1)
Stop of Clock
<Example>
<Example>
<Example>
PMPLL bit
PMPLL bit
PMPLL bit
MCKO bit
MCKO bit
(1) Power down PLL: PMPLL bit = “1” → “0”
(2) Stop MCKO clock: MCKO bit = “1” → “0”
(3) Stop an external master clock.
(1) Power down PLL: PMPLL bit = “1” → “0”
(2) Stop the external BICK and LRCK clocks
(1) Power down PLL: PMPLL bit = “1” → “0”
(2) Stop the external master clock.
Stop MCKO output: MCKO bit = “1” → “0”
"1" or "0"
Input
Input
Input
Input
(1)
(1)
(1)
(1)
(2)
(3)
(2)
(2)
(2)
Figure 81. Clock Stopping Sequence (1)
Figure 82. Clock Stopping Sequence (2)
Figure 83. Clock Stopping Sequence (3)
- 115 -
Example:
Example
Example
Input Master Clock Select at PLL Mode: 11.2896MHz
BICK frequency at Master Mode: 64fs
Audio I/F Format: MSB justified (ADC & DAC)
Audio I/F Format: MSB justified (ADC & DAC)
Audio I/F Format: MSB justified (ADC & DAC)
PLL Reference clock: MCKI
Sampling Frequency: 44.1kHz
PLL Reference clock: BICK
BICK frequency: 64fs
BICK frequency: 64fs
Sampling Frequency: 44.1kHz
Sampling Frequency: 44.1kHz
(1) (2) Addr:01H, Data:08H
(3) Stop an external MCKI
(2) Stop the external clocks
(2) Stop the external clocks
(1) Addr:01H, Data:00H
(1) Addr:01H, Data:00H
[AK4648]
2007/06

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