m37702s1afp Mitsumi Electronics, Corp., m37702s1afp Datasheet - Page 42

• Manufacturer Part Number: m37702s1afp
• Description: Single-chip 16-bit Cmos Microcomputer
• Manufacturer: Mitsumi Electronics, Corp.

• Wait bit
As shown in Figure 54, when the external memory area is ac-
cessed with the processor mode register bit 2 (wait bit) cleared to
“0”, the “L” width of E signal becomes twice compared with no wait
(the wait bit is “1”). The wait bit is cleared to “0” at reset.
The accessing of internal memory area is performed in no wait
mode regardless of the wait bit.
The processor modes are described below.
Fig. 53 External memory area for each processor mode
Fig. 54 Relationship between wait bit and access time
42
FFFFFF
Wait bit
Wait bit
FFFF
C000
The shaded area is the external memory area.
“1”
“0”
27F
Internal clock
Memory expansion
80
2
9
16
16
16
16
16
16
16
mode
ROM
RAM
ALE
Port P2
E
ALE
Port P2
E
_
Microprocessor
Address
Address
mode
RAM
Data
Data
Address
Address
Data
C
A
2
9
16
16
16
16
Evaluation
chip mode
Data
RAM
M37702M2AXXXFP, M37702M2BXXXFP
____
(1) Single-chip mode [00]
Single-chip mode is entered by connecting the CNV
and starting from reset. Ports P4 to P0 all function as normal I/O
ports. Port P4
pin by 2 by setting bit 7 of processor mode register to “1”.
(2) Memory expansion mode [01]
Memory expansion mode is entered by setting the processor
mode bits to “01” after connecting the CNV
ing from reset.
Port P0 becomes an address output pin and loses its I/O port
function.
Port P1 has two functions depending on the level of the BYTE pin.
When the BYTE pin level is “L”, port P1 functions as an address
output pin while E is “H” and as an odd address data I/O pin while
_
E is “L”. However, if an internal memory is read, external data is
ignored while E is “L”. In this case the I/O port function is lost.
When the BYTE pin level “H”, port P1 functions as an address out-
put pin and loses its I/O port function.
Port P2 has two functions depending on the level of the BYTE pin.
When the BYTE pin level is “L”, port P2 functions as an address
output pin while E is “H” and as an even address data I/O pin
while E is “L”. However, if an internal memory is read, external
data is ignored while E is “L”.
When the BYTE pin level is “H”, port P2 functions as an address
output pin while E is “H” and as an even and odd address data I/O
pin while E is “L”. However, if an internal memory is read, external
data is ignored while E is “L”. In this case the I/O port function is
lost.
Ports P3
output pin respectively and lose their I/O port functions.
R/W is a read/write signal which indicates a read when it is “H”
and a write when it is “L”.
BHE is a byte high enable signal which indicates that an odd ad-
dress is accessed when it is “L”.
Therefore, two bytes at even and odd addresses are accessed si-
multaneously if address A
__
M37702S1AFP, M37702S1BFP
_
0
_
, P3
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
1
_
2
, P3
can be the
_
_
_
2
, and P3
_
_
MITSUBISHI MICROCOMPUTERS
0
is “L” and BHE is “L”.
3
1
become R/W, BHE, ALE, and HLDA
output pin divided the clock to X
____
__ ____
SS
pin to V
SS
SS
pin to V
and start-
_____
SS
IN