m37702s1afp Mitsumi Electronics, Corp., m37702s1afp Datasheet - Page 19

• Manufacturer Part Number: m37702s1afp
• Description: Single-chip 16-bit Cmos Microcomputer
• Manufacturer: Mitsumi Electronics, Corp.

Data write and data read are performed in the same way as for
timer mode. That is, when data is written to timer Ai halted, it is
also written to the reload register and the counter. When data is
written to timer Ai which is busy, the data is written to the reload
register, but not to the counter. The counter is reloaded with new
data from the reload register at the next reload time. The counter
can be read at any time.
In event counter mode, whether to increment or decrement the
counter can also be determined by supplying two-phase pulse in-
put with phase shifted by 90° to timer A2, A3, or A4. There are two
types of two-phase pulse processing operations. One uses timers
A2 and A3, and the other uses timer A4. In either processing op-
eration, two-phase pulse is input in the same way, that is, pulses
out of phase by 90° are input at the TAj
TAj
When timers A2 and A3 are used, as shown in Figure 17, the
count is incremented when a rising edge is input to the TAk
after the level of TAk
when the falling edge is inserted, the count is decremented.
For timer A4, as shown in Figure 18, when a phase related pulse
with a rising edge input to the TA4
TA4
the respective rising edge and falling edge of the TA4
TA4
When a phase related pulse with a falling edge input to the
TA4
“L”, the count is decremented at the respective rising edge and
falling edge of the TA4
this two-phase pulse signal processing, timer Aj mode register bit
0 and bit 4 must be set to “1” and bits 1, 2, 3, and 5 must be “0”.
Fig. 17 Two-phase pulse processing operation of timer A2 and timer A3
Fig. 18 Two-phase pulse processing operation of timer A4
IN
IN
OUT
OUT
pin.
pin.
pin is input after the level of TA4
pin changes from “L” to “H”, the count is incremented at
TA4
TA4
TAk
TAk
(k = 2, 3)
OUT
IN
OUT
IN
OUT
Increment- count at each edge
IN
(k = 2, 3) pin changes from “L” to “H”, and
Increment- count at each edge
Increment-
pin and TA4
count
Increment-
IN
count
pin is input after the level of
OUT
IN
OUT
pin changes from “H” to
pin. When performing
Increment-
count
(j = 2 to 4) pin and
Decrement-
OUT
count
Decrement- count at each edge
Decrement- count at each edge
M37702M2AXXXFP, M37702M2BXXXFP
pin and
IN
Decrement-
pin
count
Bits 6 and 7 are ignored. Note that bits 5, 6, and 7 of the up-down
flag register (44
lection bit for timer A2, A3, and A4 respectively. Each timer
operates in normal event counter mode when the corresponding
bit is “0” and performs two-phase pulse signal processing when it
is “1”.
Count is started by setting the count start flag to “1”. Data write
and read are performed in the same way as for normal event
counter mode. Note that the direction register of the input port
must be set to input mode because two-phase pulse signal is in-
put. Also, there can be no pulse output in this mode.
Fig. 19 Timer Aj mode register bit configuration when per-
Decrement-
count
M37702S1AFP, M37702S1BFP
7 6 5 4 3 2 1 0
forming two-phase pulse signal processing in event
counter mode
0
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
1 0 0
16
) are the two-phase pulse signal processing se-
0 1
MITSUBISHI MICROCOMPUTERS
0 1 : Always “01” in event counter
0 1 0 0 : Always “0100” when processing
Timer A2 mode register
Timer A3 mode register
Timer A4 mode register
: Not used in event counter mode
mode
two-phase pulse signal
Addresses
58
59
5A
16
16
16
19