sc68c2550b NXP Semiconductors, sc68c2550b Datasheet - Page 33

• Manufacturer Part Number: sc68c2550b
• Description: Sc68c2550b 5 V, 3.3 V And 2.5 V Dual Uart, 5 Mbit/s Max. , With 16-byte Fifos And Motorola Up Interface
• Manufacturer: NXP Semiconductors

Philips Semiconductors
13. Abbreviations
14. Revision history
Table 27:
9397 750 14941
Product data sheet
Document ID
SC68C2550B_2
Modifications:
SC68C2550B_1
Revision history
Release date
20050428
20050329
•
•
•
[4]
[5]
[6]
[7]
[8]
[9]
Table 26:
Acronym
CPU
DMA
FIFO
ISDN
LSB
MSB
TTL
UART
Added ‘and Motorola P interface’ to descriptive title on first page.
Section 2 “Features” on page
Added
These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the
solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink
on the top side, the solder might be deposited on the heatsink surface.
If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave
direction. The package footprint must incorporate solder thieves downstream and at the side corners.
Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger
than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered
pre-mounted on flex foil. However, the image sensor package can be mounted by the client on a flex foil by
using a hot bar soldering process. The appropriate soldering profile can be provided on request.
Hot bar soldering or manual soldering is suitable for PMFP packages.
Section 18 “Trademarks” on page
Abbreviations
Data sheet status
Product data sheet
Product data sheet
Description
Central Processing Unit
Direct Memory Access
First In/First Out
Integrated Service Digital Network
Least Significant Bit
Most Significant Bit
Transistor-Transistor Logic
Universal Asynchronous Receiver and Transmitter
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
Rev. 02 — 28 April 2005
1, first bullet: added ‘with Motorola P interface’
Change notice
-
-
34.
Doc. number
9397 750 14941
9397 750 14698
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
SC68C2550B
Supersedes
SC68C2550B_1
-
33 of 35