sc68c652b NXP Semiconductors, sc68c652b Datasheet - Page 4

• Manufacturer Part Number: sc68c652b
• Description: Sc68c652b 5 V, 3.3 V And 2.5 V Dual Uart, 5 Mbit/s Max. With 32-byte Fifos, Irda Encoder/decoder, And Motorola Up Interface
• Manufacturer: NXP Semiconductors

Philips Semiconductors
5. Pinning information
Table 2:
9397 750 14657
Product data sheet
Symbol
A0
A1
A2
A3
CDA, CDB
CS
CTSA, CTSB
Pin description
Pin
28
27
26
11
40, 16
10
38, 23
5.1 Pinning
5.2 Pin description
Fig 2. Pin configuration for LQFP48
Type
I
I
I
I
I
I
I
Description
Address 0 select bit. Internal registers address selection.
Address 1 select bit. Internal registers address selection.
Address 2 select bit. Internal registers address selection.
Address 3 select bit. A3 is used to select Channel A or Channel B. A logic LOW
selects Channel A, and a logic HIGH selects Channel B. (See
Carrier Detect (active LOW). These inputs are associated with individual UART
channels A and B. A logic 0 on these pins indicates that a carrier has been detected by
the modem for that channel.
Chip Select (active LOW). This pin enables data transfers between the user CPU and
the SC68C652B for the channel(s) addressed. Individual UART sections (A, B) are
addressed by A3. See
Clear to Send (active LOW). These inputs are associated with individual UART
channels A and B. A logic 0 (LOW) on the CTS pins indicates the modem or data set is
ready to accept transmit data from the SC68C652B. Status can be tested by reading
MSR[4]. These pins have no effect on the UART’s transmit or receive operation.
TXRDYB
OP2B
RXB
RXA
TXA
TXB
n.c.
CS
D5
D6
D7
A3
Rev. 01 — 25 April 2005
10
11
12
1
2
3
4
5
6
7
8
9
Dual UART with 32-byte FIFOs and IrDA encoder/decoder
Table
3.
SC68C652BIB48
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
002aab324
36
35
34
33
32
31
30
29
28
27
26
25
SC68C652B
Table
RESET
DTRB
DTRA
RTSA
OP2A
RXRDYA
IRQ
n.c.
A0
A1
A2
n.c.
3.)
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