sc68c652b NXP Semiconductors, sc68c652b Datasheet - Page 24

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sc68c652b

Manufacturer Part Number
sc68c652b
Description
Sc68c652b 5 V, 3.3 V And 2.5 V Dual Uart, 5 Mbit/s Max. With 32-byte Fifos, Irda Encoder/decoder, And Motorola Up Interface
Manufacturer
NXP Semiconductors
Datasheet

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Product data sheet
7.8 Modem Status Register (MSR)
7.9 Scratchpad Register (SPR)
This register provides the current state of the control interface signals from the modem, or
other peripheral device to which the SC68C652B is connected. Four bits of this register
are used to indicate the changed information. These bits are set to a logic 1 whenever a
control input from the modem changes state. These bits are set to a logic 0 whenever the
CPU reads this register.
Table 22:
[1]
The SC68C652B provides a temporary data register to store 8 bits of user information.
Bit
7
6
5
4
3
2
1
0
Whenever any MSR bit 0:3 is set to logic 1, a Modem Status Interrupt will be generated.
Symbol
MSR[7]
MSR[6]
MSR[5]
MSR[4]
MSR[3]
MSR[2]
MSR[1]
MSR[0]
Modem Status Register bits description
Description
CD. During normal operation, this bit is the complement of the CD input.
Reading this bit in the loop-back mode produces the state of MCR[3]
(OP2).
RI. During normal operation, this bit is the complement of the RI input.
Reading this bit in the loop-back mode produces the state of MCR[2]
(OP1).
DSR. During normal operation, this bit is the complement of the DSR
input. During the loop-back mode, this bit is equivalent to MCR[0] (DTR).
CTS. During normal operation, this bit is the complement of the CTS input.
During the loop-back mode, this bit is equivalent to MCR[1] (RTS).
CD
RI
DSR
CTS
Rev. 01 — 25 April 2005
logic 0 = no CD change (normal default condition)
logic 1 = the CD input to the SC68C652B has changed state since the
last time it was read. A modem Status Interrupt will be generated.
logic 0 = no RI change (normal default condition)
logic 1 = the RI input to the SC68C652B has changed from a logic 0 to a
logic 1. A modem Status Interrupt will be generated.
logic 0 = no DSR change (normal default condition)
logic 1 = the DSR input to the SC68C652B has changed state since the
last time it was read. A modem Status Interrupt will be generated.
logic 0 = no CTS change (normal default condition)
logic 1 = the CTS input to the SC68C652B has changed state since the
last time it was read. A modem Status Interrupt will be generated.
[1]
[1]
[1]
Dual UART with 32-byte FIFOs and IrDA encoder/decoder
[1]
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
SC68C652B
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