mc9s12ne64 Freescale Semiconductor, Inc, mc9s12ne64 Datasheet - Page 416

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mc9s12ne64

Manufacturer Part Number
mc9s12ne64
Description
Hcs12 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Chapter 15 Multiplexed External Bus Interface (MEBIV3)
15.3.2.16 Port K Data Direction Register (DDRK)
Read: Anytime
Write: Anytime
This register determines the primary direction for each port K pin configured as general-purpose I/O. This
register is not in the map in peripheral or expanded modes while the EMK control bit in MODE register is
set. Therefore, these accesses will be echoed externally.
15.4
15.4.1
The external signals LSTRB, R/W, and AB0 indicate the type of bus access that is taking place. Accesses
to the internal RAM module are the only type of access that would produce LSTRB = AB0 = 1, because
the internal RAM is specifically designed to allow misaligned 16-bit accesses in a single cycle. In these
cases the data for the address that was accessed is on the low half of the data bus and the data for
address + 1 is on the high half of the data bus. This is summarized in
416
DDRK
Field
7:0
Reset
W
R
Functional Description
Detecting Access Type from External Signals
Data Direction Port K Bits
0 Associated pin is a high-impedance input
1 Associated pin is an output
Note: It is unwise to write PORTK and DDRK as a word access. If you are changing port K pins from inputs to
Note: To ensure that you read the correct value from the PORTK pins, always wait at least one cycle after writing
Bit 7
0
7
outputs, the data may have extra transitions during the write. It is best to initialize PORTK before enabling
as outputs.
to the DDRK register before reading from the PORTK register.
LSTRB
1
0
1
0
0
Figure 15-20. Port K Data Direction Register (DDRK)
6
0
6
Table 15-15. Access Type vs. Bus Control Pins
AB0
Table 15-14. EBICTL Field Descriptions
0
1
0
1
0
MC9S12NE64 Data Sheet, Rev. 1.1
5
0
5
R/W
1
1
0
0
1
4
0
4
Description
8-bit read of an even address
8-bit read of an odd address
8-bit write of an even address
8-bit write of an odd address
16-bit read of an even address
3
3
0
Type of Access
Table
2
2
0
15-15.
Freescale Semiconductor
1
0
1
Bit 0
0
0

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