mc9s12ne64 Freescale Semiconductor, Inc, mc9s12ne64 Datasheet - Page 111

• Manufacturer Part Number: mc9s12ne64
• Description: Hcs12 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Freescale Semiconductor
$2F-$3F
$06-07
$0C
$0D
$1C
$1D
$2C
$2D
$0A
$0B
$0E
$0F
$1A
$1B
$1E
$1F
$2A
$2B
$2E
$08
$09
$10
$11
$12
$13
$14
$15
$16
$17
$18
$19
$20
$21
$22
$23
$24
$25
$26
$27
$28
$29
Reserved
Port S I/O Register (PTS)
Port S Input Register (PTIS)
Port S Data Direction Register (DDRS)
Port S Reduced Drive Register (RDRS)
Port S Pull Device Enable Register (PERS)
Port S Polarity Select Register (PPSS)
Port S Wired-Or Mode Register (WOMS)
Reserved
Port G I/O Register (PTG)
Port G Input Register (PTIG)
Port G Data Direction Register (DDRG)
Port G Reduced Drive Register (RDRG)
Port G Pull Device Enable Register (PERG)
Port G Polarity Select Register (PPSG)
Port G Interrupt Enable Register (PIEG)
Port G Interrupt Flag Register (PIFG)
Port H I/O Register (PTH)
Port H Input Register (PTIH)
Port H Data Direction Register (DDRH)
Port H Reduced Drive Register (RDRH)
Port H Pull Device Enable Register (PERH)
Port H Polarity Select Register (PPSH)
Port H Interrupt Enable Register (PIEH)
Port H Interrupt Flag Register (PIFH)
Port J I/O Register (PTJ)
Port J Input Register (PTIJ)
Port J Data Direction Register (DDRJ)
Port J Reduced Drive Register (RDRJ)
Port J Pull Device Enable Register (PERJ)
Port J Polarity Select Register (PPSJ)
Port J Interrupt Enable Register (PIEJ)
Port J Interrupt Flag Register (PIFJ)
Port L I/O Register (PTL)
Port L Input Register (PTIL)
Port L Data Direction Register (DDRL)
Port L Reduced Drive Register (RDRL)
Port L Pull Device Enable Register (PERL)
Port L Polarity Select Register (PPSL)
Port L Wired-Or Mode Register (WOML)
Reserved
Table 3-2. PIM Module Memory Map (continued)
MC9S12NE64 Data Sheet, Rev. 1.1
Memory Map and Register Descriptions
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RW
RW
—
—
—
R
R
R
R
R
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