at91sam9260-cj ATMEL Corporation, at91sam9260-cj Datasheet - Page 710

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at91sam9260-cj

Manufacturer Part Number
at91sam9260-cj
Description
At91 Arm Thumb Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet

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40.5.4
Figure 40-2. EOCx and DRDY Flag Behavior
710
(ADC_CHSR)
(ADC_SR)
(ADC_SR)
EOCx
DRDY
CHx
AT91SAM9260
Conversion Results
Write the ADC_CR
with START = 1
When a conversion is completed, the resulting 10-bit digital value is stored in the Channel Data
Register (ADC_CDR) of the current channel and in the ADC Last Converted Data Register
(ADC_LCDR).
The channel EOC bit in the Status Register (ADC_SR) is set and the DRDY is set. In the case of
a connected PDC channel, DRDY rising triggers a data transfer request. In any case, either
EOC and DRDY can trigger an interrupt.
Reading one of the ADC_CDR registers clears the corresponding EOC bit. Reading ADC_LCDR
clears the DRDY bit and the EOC bit corresponding to the last converted channel.
Conversion Time
Read the ADC_CDRx
Write the ADC_CR
with START = 1
Conversion Time
Read the ADC_LCDR
6221G–ATARM–31-Jan-08

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