at91sam9260-cj ATMEL Corporation, at91sam9260-cj Datasheet - Page 216

• Manufacturer Part Number: at91sam9260-cj
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

Figure 22-6. Self-refresh Mode Behavior
22.5.5.2
6221G–ATARM–31-Jan-08
SDRAMC_A[12:0]
SDRAMC_SRR
SDCKE
SDWE
SDCK
SDCS
Write
RAS
CAS
Low-power Mode
SRCB = 1
The SDRAM device must remain in self-refresh mode for a minimum period of t
remain in self-refresh mode for an indefinite period. This is described in
This mode is selected by programming the LPCB field to 2 in the SDRAMC Low Power Register.
Power consumption is greater than in self-refresh mode. All the input and output buffers of the
SDRAM device are deactivated except SDCKE, which remains low. In contrast to self-refresh
mode, the SDRAM device cannot remain in low-power mode longer than the refresh period (64
ms for a whole device refresh operation). As no auto-refresh operations are performed by the
SDRAM itself, the SDRAM Controller carries out the refresh operation. The exit procedure is
faster than in self-refresh mode.
This is described in
Figure
22-7.
Self Refresh Mode
to the SDRAM Controller
Access Request
AT91SAM9260
T
Figure
XSR
= 3
22-6.
RAS
Row
and may
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