at91sam9260-cj ATMEL Corporation, at91sam9260-cj Datasheet - Page 204
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
at91sam9260-cj
Manufacturer Part Number
at91sam9260-cj
Description
At91 Arm Thumb Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet
1.AT91SAM9260-CJ.pdf
(790 pages)
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21.14.3
Register Name:
Access Type:
• NWE_CYCLE: Total Write Cycle Length
The total write cycle length is the total duration in clock cycles of the write cycle. It is equal to the sum of the setup, pulse
and hold steps of the NWE and NCS signals. It is defined as:
Write cycle length = (NWE_CYCLE[8:7]*256 + NWE_CYCLE[6:0]) clock cycles
• NRD_CYCLE: Total Read Cycle Length
The total read cycle length is the total duration in clock cycles of the read cycle. It is equal to the sum of the setup, pulse
and hold steps of the NRD and NCS signals. It is defined as:
Read cycle length = (NRD_CYCLE[8:7]*256 + NRD_CYCLE[6:0]) clock cycles
6221G–ATARM–31-Jan-08
31
23
15
–
–
7
SMC Cycle Register
30
22
14
SMC_CYCLE[0..7]
Read-write
–
–
6
29
21
13
–
–
5
28
20
12
–
–
4
NWE_CYCLE
NRD_CYCLE
27
19
11
–
–
3
26
18
10
–
–
2
AT91SAM9260
25
17
–
9
–
1
NWE_CYCLE
NRD_CYCLE
24
16
8
0
204
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