at91sam9260-cj ATMEL Corporation, at91sam9260-cj Datasheet - Page 196
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at91sam9260-cj
Manufacturer Part Number
at91sam9260-cj
Description
At91 Arm Thumb Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet
1.AT91SAM9260-CJ.pdf
(790 pages)
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21.12.2
Figure 21-32. Clock Rate Transition Occurs while the SMC is Performing a Write Operation
6221G–ATARM–31-Jan-08
internal signal from PMC
Switching from (to) Slow Clock Mode to (from) Normal Mode
Slow Clock Mode
NBS0, NBS1,
NBS2, NBS3,
A0,A1
This write cycle finishes with the slow clock mode set
A
[25:2]
NWE
MCK
NCS
of parameters after the clock rate transition
When switching from slow clock mode to the normal mode, the current slow clock mode transfer
is completed at high clock rate, with the set of slow clock mode parameters.See
page
Figure 21-33
other.
196. The external device may not be fast enough to support such timings.
SLOW CLOCK MODE WRITE
1
NWE_CYCLE = 3
illustrates the recommended procedure to properly switch from one mode to the
1
1
SLOW CLOCK MODE WRITE
1
1
Slow clock mode transition is detected:
1
Reload Configuration Wait State
2
NORMAL MODE WRITE
NWE_CYCLE = 7
AT91SAM9260
3
2
Figure 21-32 on
196
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