at91sam9260-cj ATMEL Corporation, at91sam9260-cj Datasheet - Page 18

• Manufacturer Part Number: at91sam9260-cj
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

7.2.1
7.2.2
7.2.3
18
AT91SAM9260
Matrix Masters
Matrix Slaves
Master to Slave Access
The Bus Matrix of the AT91SAM9260 manages six Masters, which means that each master can
perform an access concurrently with others, according the slave it accesses is available.
Each Master has its own decoder that can be defined specifically for each master. In order to
simplify the addressing, all the masters have the same decodings.
Table 7-1.
Each Slave has its own arbiter, thus allowing a different arbitration per Slave to be programmed.
Table 7-2.
All the Masters can normally access all the Slaves. However, some paths do not make sense,
such as allowing access from the Ethernet MAC to the Internal Peripherals. Thus, these paths
are forbidden or simply not wired, and shown “-” in the following table.
Table 7-3.
Master 0
Master 1
Master 2
Master 3
Master 4
Master 5
Slave 0
Slave 1
Slave 2
Slave 3
Slave 4
• Remap Command
0
1
– Allows Remapping of an Internal SRAM in Place of the Boot Non-Volatile Memory
– Allows Handling of Dynamic Exception Vectors
Internal SRAM
Internal SRAM
Master
Slave
4 KBytes
4 KBytes
List of Bus Matrix Masters
List of Bus Matrix Slaves
AT91SAM9260 Masters to Slaves Access
Internal SRAM0 4 KBytes
Internal SRAM1 4 KBytes
Internal ROM
USB Host User Interface
External Bus Interface
Internal Peripherals
Instruction &
ARM926 Data
ARM926
PDC
USB Host DMA
ISI Controller
Ethernet MAC
ARM926
0 & 1
Data
X
X
™
Instruction
Peripheral
Controller
DMA
2
X
X
USB Host
Controller
X
X
3
Controller
ISI
X
X
4
6221G–ATARM–31-Jan-08
Ethernet
MAC
X
X
5