dspic33fj128mc706at-i-pt Microchip Technology Inc., dspic33fj128mc706at-i-pt Datasheet - Page 75

• Manufacturer Part Number: dspic33fj128mc706at-i-pt
• Description: High-performance, 16-bit Digital Signal Controllers
• Manufacturer: Microchip Technology Inc.

5.0
The dsPIC33FJXXXMCX06A/X08A/X10A devices con-
tain internal Flash program memory for storing and
executing application code. The memory is readable,
writable and erasable during normal operation over the
entire V
Flash memory can be programmed in two ways:
1.
2.
ICSP allows a dsPIC33FJXXXMCX06A/X08A/X10A
device to be serially programmed while in the end
application circuit. This is simply done with two lines for
programming clock and programming data (one of the
alternate programming pin pairs: PGECx/PGEDx), and
three other lines for power (V
Master Clear (MCLR). This allows customers to
manufacture boards with unprogrammed devices and
FIGURE 5-1:
© 2009 Microchip Technology Inc.
Note:
In-Circuit Serial Programming™ (ICSP™)
programming capability
Run-Time Self-Programming (RTSP)
DD
FLASH PROGRAM MEMORY
range.
This data sheet summarizes the features of
the dsPIC33FJXXXMCX06A/X08A/X10A
family of devices. However, it is not
intended to be a comprehensive reference
source. To complement the information in
this data sheet, refer to Section 5. “Flash
Programming”
“dsPIC33F Family Reference Manual”,
which is available from the Microchip web
site (www.microchip.com).
Using
Program Counter
Using
Table Instruction
User/Configuration
Space Select
ADDRESSING FOR TABLE REGISTERS
dsPIC33FJXXXMCX06A/X08A/X10A
(DS70191)
DD
), ground (V
1/0
0
TBLPAG Reg
8 Bits
in
SS
) and
the
Preliminary
Program Counter
24-Bit EA
24 Bits
then program the digital signal controller just before
shipping the product. This also allows the most recent
firmware or a custom firmware to be programmed.
RTSP is accomplished using TBLRD (table read) and
TBLWT (table write) instructions. With RTSP, the user
can write program memory data by blocks (or ‘rows’) of
64 instructions (192 bytes) at a time or by single
program memory word; the user can erase program
memory in blocks or ‘pages’ of 512 instructions
(1536 bytes) at a time.
5.1
Regardless of the method used, all programming of
Flash memory is done with the table read and table
write instructions. These allow direct read and write
access to the program memory space from the data
memory while the device is in normal operating mode.
The 24-bit target address in the program memory is
formed using bits<7:0> of the TBLPAG register and the
Effective Address (EA) from a W register specified in
the table instruction, as shown in Figure 5-1.
The TBLRDL and TBLWTL instructions are used to read
or write to bits<15:0> of program memory. TBLRDL and
TBLWTL can access program memory in both Word
and Byte modes.
The TBLRDH and TBLWTH instructions are used to read
or write to bits<23:16> of program memory. TBLRDH
and TBLWTH can also access program memory in Word
or Byte mode.
Working Reg EA
16 Bits
Table Instructions and Flash
Programming
0
Byte
Select
DS70594A-page 73