dspic33fj128mc706at-i-pt Microchip Technology Inc., dspic33fj128mc706at-i-pt Datasheet - Page 258

• Manufacturer Part Number: dspic33fj128mc706at-i-pt
• Description: High-performance, 16-bit Digital Signal Controllers
• Manufacturer: Microchip Technology Inc.

dsPIC33FJXXXMCX06A/X08A/X10A
TABLE 23-2:
DS70594A-page 256
GWRP
IESO
FNOSC<2:0>
FCKSM<1:0>
OSCIOFNC
POSCMD<1:0>
FWDTEN
WINDIS
PLLKEN
WDTPRE
WDTPOST<3:0>
Bit Field
dsPIC33FJXXXMCX06A/X08A/X10A CONFIGURATION BITS DESCRIPTION
FOSCSEL
FOSCSEL
Register
FOSC
FOSC
FWDT
FWDT
FWDT
FWDT
FWDT
FOSC
FGS
General Segment Write-Protect bit
1 = User program memory is not write-protected
0 = User program memory is write-protected
Two-Speed Oscillator Start-up Enable bit
1 = Start-up device with FRC, then automatically switch to the
0 = Start-up device with user-selected oscillator source
Initial Oscillator Source Selection bits
111 = Internal Fast RC (FRC) oscillator with postscaler
110 = Internal Fast RC (FRC) oscillator with divide-by-16
101 = LPRC oscillator
100 = Secondary (LP) oscillator
011 = Primary (XT, HS, EC) oscillator with PLL
010 = Primary (XT, HS, EC) oscillator
001 = Internal Fast RC (FRC) oscillator with PLL
000 = FRC oscillator
Clock Switching Mode bits
1x = Clock switching is disabled, Fail-Safe Clock Monitor is disabled
01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
OSC2 Pin Function bit (except in XT and HS modes)
1 = OSC2 is clock output
0 = OSC2 is general purpose digital I/O pin
Primary Oscillator Mode Select bits
11 = Primary oscillator disabled
10 = HS Crystal Oscillator mode
01 = XT Crystal Oscillator mode
00 = EC (External Clock) mode
Watchdog Timer Enable bit
1 = Watchdog Timer always enabled (LPRC oscillator cannot be disabled.
0 = Watchdog Timer enabled/disabled by user software (LPRC can be
Watchdog Timer Window Enable bit
1 = Watchdog Timer in Non-Window mode
0 = Watchdog Timer in Window mode
PLL Lock Enable bit
1 = Clock switch to PLL source will wait until the PLL lock signal is valid
0 = Clock switch will not wait for the PLL lock signal
Watchdog Timer Prescaler bit
1 = 1:128
0 = 1:32
Watchdog Timer Postscaler bits
1111 = 1:32,768
1110 = 1:16,384
0001 = 1:2
0000 = 1:1
.
.
.
Clearing the SWDTEN bit in the RCON register will have no effect.)
disabled by clearing the SWDTEN bit in the RCON register.)
user-selected oscillator source when ready
Preliminary
Description
© 2009 Microchip Technology Inc.