atmega32c1 ATMEL Corporation, atmega32c1 Datasheet - Page 220

• Manufacturer Part Number: atmega32c1
• Description: Atmega32m1 Automotive 8-bit Avr Microcontroller With 32k/64k Bytes In-system Programmable Flash
• Manufacturer: ATMEL Corporation

17.6
Table 17-5.
17.6.1
220
LIN / UART Register Description
ATmega32/64/M1/C1
LIN Control Register - LINCR
LINBRRH
LINBRRL
LINENIR
LINERR
LINBTR
LINDLR
LINSEL
LINDAT
LINSIR
LINIDR
LINCR
Name
LIN/UART Register Bits Summary
0
0
0
0
0
0
0
0
1
0
0
LSWRES
LABORT
LDATA7
LTXDL3
LIDST2
LDISR
LDIV7
Bit 7
• Bit 7 - LSWRES: Software Reset
• Bit 6 - LIN13: LIN 1.3 mode
• Bit 5:4 - LCONF[1:0]: Configuration
LP1
—
—
—
Bit
Read/Write
Initial Value
a.
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
– 0 = No action,
– 1 = Software reset (this bit is self-reset at the end of the reset procedure).
– 0 = LIN 2.1 (default),
– 1 = LIN 1.3.
–00 = LIN Standard configuration (listen mode “off”, CRC “on” & Frame_Time_Out “on”,
– 01 = No CRC, no Time out (listen mode “off”),
LIN mode (default = 00):
0
0
0
0
0
0
0
0
0
0
0
LTOERR
LDATA6
LTXDL2
LIDST1
LDIV6
LIN13
Bit 6
LP0
—
—
—
LSWRES
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
7
0
0
0
0
0
1
0
0
0
LID5/LDL1
0
0
0
LOVERR
LCONF1
LDATA5
LTXDL1
LIDST0
LIN13
LDIV5
R/W
LBT5
Bit 5
6
0
—
—
—
R/(W)
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
LCONF1
R/W
0
0
0
0
0
0
0
0
LID4/LDL0
0
0
0
5
0
LCONF0
LDATA4
LTXDL0
LBUSY
LFERR
LDIV4
LBT4
Bit 4
—
—
—
R/(W)
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
LCONF0
R/W
4
0
0
0
0
0
0
0
0
0
0
0
0
LENERR
LRXDL3
LDATA3
LSERR
LDIV11
LAINC
LDIV3
LENA
LERR
LBT3
Bit 3
LID3
R/W
R/(W)
LENA
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
3
0
R
one
0
0
0
0
0
0
0
0
0
0
0
LENIDOK
LCMD2
LRXDL2
LDATA2
LINDX2
LCMD2
LPERR
LDIV10
R/W
LIDOK
LDIV2
LBT2
Bit 2
2
0
LID2
R/W
R/(W)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
one
LCMD1
R/W
1
0
0
0
0
0
0
0
0
0
0
0
0
LENTXOK
LRXDL1
LDATA1
LINDX1
LCMD1
LCERR
LTXOK
LDIV1
LDIV9
LBT1
Bit 1
LID1
R/W
R/(W)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
LCMD0
R/W
one
0
0
7647A–AVR–02/08
0
0
LENRXOK
0
0
0
0
0
0
0
0
0
LRXDL0
LDATA0
LINDX0
LCMD0
LRXOK
LBERR
LDIV0
LDIV8
LBT0
Bit 0
LID0
LINCR
R/W
R/(W)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
one