atmega32c1 ATMEL Corporation, atmega32c1 Datasheet - Page 212

• Manufacturer Part Number: atmega32c1
• Description: Atmega32m1 Automotive 8-bit Avr Microcontroller With 32k/64k Bytes In-system Programmable Flash
• Manufacturer: ATMEL Corporation

17.5.6
17.5.6.1
17.5.6.2
17.5.6.3
212
ATmega32/64/M1/C1
Bit Timing
Baud rate Generator
Re-synchronization in LIN Mode
Handling LBT[5..0]
•
The busy signal is not generated during a byte reception.
The baud rate is defined to be the transfer rate in bits per second (bps):
•
•
•
•
Equation for calculating baud rate:
Equation for setting LINDIV value:
Note that in reception a majority vote on three samplings is made.
When waiting for Rx Header, LBT[5..0] = 32 in LINBTR register. The re-synchronization begins
when the BREAK is detected. If the BREAK size is not in the range (11 bits min., 28 bits max. —
13 bits nominal), the BREAK is refused. The re-synchronization is done by adjusting LBT[5..0]
value to the SYNCH field of the received header (0x55). Then the PROTECTED IDENTIFIER is
sampled using the new value of LBT[5..0]. The re-synchronization implemented in the controller
tolerates a clock deviation of ± 20% and adjusts the baud rate in a ± 2% range.
The new LBT[5..0] value will be used up to the end of the response. Then, the LBT[5..0] will be
reset to 32 for the next header.
The LINBTR register can be used to re-calibrate the clock oscillator.
The re-synchronization is not performed if the LIN node is enabled as a master.
LDISR bit of LINBTR register is used to:
•
•
Note that the LENA bit of LINCR register is important for this handling (see
213).
“LIN Data Register” - LINDAT.
BAUD: Baud rate (in bps),
f
LDIV[11..0]: Contents of LINBRRH & LINBRRL registers - (0-4095), the pre-scaler receives
clk
LBT[5..0]: Least significant bits of - LINBTR register- (0-63) is the number of samplings in a
LIN or UART bit (default value 32).
To enable the setting of LBT[5..0] (to manually adjust the baud rate especially in the case of
UART mode). A minimum of 8 is required for LBT[5..0] due to the sampling operation.
Disable the re-synchronization in LIN Slave Mode for test purposes.
clk
i/o
i/o
: System I/O clock frequency,
as input clock.
BAUD =
LDIV[11..0] = (
f
clk
i/o
/ LBT[5..0] x (LDIV[11..0] + 1)
f
clk
i/o
/ LBT[5..0] x BAUD ) - 1
Figure 17-8 on page
7647A–AVR–02/08