atmega32c1 ATMEL Corporation, atmega32c1 Datasheet - Page 195

• Manufacturer Part Number: atmega32c1
• Description: Atmega32m1 Automotive 8-bit Avr Microcontroller With 32k/64k Bytes In-system Programmable Flash
• Manufacturer: ATMEL Corporation

16.11.2
7647A–AVR–02/08
CAN MOb Control and DLC Register - CANCDMOB
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine
on the whole CANSTMOB register.
Detection of more than five consecutive bits with the same polarity. This flag can generate an
interrupt.
• Bit 2 – CERR: CRC Error
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine
on the whole CANSTMOB register.
The receiver performs a CRC check on every de-stuffed received message from the start of
frame up to the data field. If this checking does not match with the de-stuffed CRC field, a CRC
error is set.
• Bit 1 – FERR: Form Error
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine
on the whole CANSTMOB register.
The form error results from one or more violations of the fixed form in the following bit fields:
• Bit 0 – AERR: Acknowledgment Error
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine
on the whole CANSTMOB register.
No detection of the dominant bit in the acknowledge slot.
• Bit 7:6 – CONMOB1:0: Configuration of Message Object
These bits set the communication to be performed (no initial value after RESET).
These bits are not cleared once the communication is performed. The user must re-write the
configuration to enable a new communication.
• Bit 5 – RPLV: Reply Valid
Used in the automatic reply mode after receiving a remote frame.
• CRC delimiter.
• Acknowledgment delimiter.
• EOF
• This operation is necessary to be able to reset the BXOK flag.
• This operation also set the corresponding bit in the CANEN registers.
Initial Value
Read/Write
Bit
– 00 - disable.
– 01 - enable transmission.
– 10 - enable reception.
– 11 - enable frame buffer reception
CONMOB1 CONMOB0
R/W
7
-
R/W
6
-
RPLV
R/W
5
-
R/W
IDE
4
-
DLC3
R/W
3
-
DLC2
ATmega32/64/M1/C1
R/W
2
-
DLC1
R/W
1
-
DLC0
R/W
0
-
CANCDMOB
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