atmega32c1 ATMEL Corporation, atmega32c1 Datasheet - Page 210

• Manufacturer Part Number: atmega32c1
• Description: Atmega32m1 Automotive 8-bit Avr Microcontroller With 32k/64k Bytes In-system Programmable Flash
• Manufacturer: ATMEL Corporation

17.5
17.5.1
17.5.2
17.5.3
17.5.4
210
LIN / UART Description
ATmega32/64/M1/C1
Reset
Clock
LIN Protocol Selection
Configuration
The AVR core reset logic signal also resets the LIN/UART controller. Another form of reset
exists, a software reset controlled by LSWRES bit in LINCR register. This self-reset bit performs
a partial reset as shown in
Table 17-2.
The I/O clock signal (clk
LIN13 bit in LINCR register is used to select the LIN protocol:
•
•
The controller checks the LIN13 bit in computing the checksum (enhanced checksum in LIN2.1 /
classic checksum in LIN 1.3). See
This bit is irrelevant for UART commands.
Depending on the mode (LIN or UART), LCONF[1..0] bits of the LINCR register set the controller
in the following configuration
Table 17-3.
Mode
UART
LIN
LIN Status & Interrupt Reg.
LIN Enable Interrupt Reg.
LIN Baud Rate Reg. High
LIN Data Buffer Selection
LIN Baud Rate Reg. Low
LIN13 = 0 (default): LIN 2.1 protocol,
LIN13 = 1: LIN 1.3 protocol.
LIN Data Length Reg.
LIN Bit Timing Reg.
LIN Identifier Reg.
LIN Control Reg.
LIN Error Reg.
Register
LCONF[1..0]
LIN Data
Reset of LIN/UART Registers
Configuration Table versus Mode
00
01
10
00
01
10
11
11
b
b
b
b
b
b
b
b
i/o
) also clocks the LIN/UART controller. It is its unique clock.
Table
(Table
LINBRRH
LINBRRL
LINENIR
17-2.
LINERR
LINBTR
LINDLR
LINDAT
LINSEL
LINSIR
LINIDR
LINCR
Name
“Rx & TX Response Functions” on page
17-3):
Listening mode, 8-bit data, no parity & 1 stop-bit
No CRC field detection or transmission
LIN standard configuration (default)
8-bit data, even parity & 1 stop-bit
8-bit data, odd parity & 1 stop-bit
8-bit data, no parity & 1 stop-bit
Reset Value
0000 0000
0000 0000
0000 0000
0000 0000
0010 0000
0000 0000
0000 0000
0000 0000
1000 0000
0000 0000
0000 0000
Frame_Time_Out disable
Listening mode
Configuration
b
b
b
b
b
b
b
b
b
b
b
LSWRES Value
0000 0000
0000 0000
0000 0000
0010 0000
uuuu uuuu
0000 0000
1000 0000
0000 0000
xxxx 0000
xxxx uuuu
xxxx 0000
b
b
b
b
b
b
b
b
b
b
b
208.
u=unchanged
7647A–AVR–02/08
x=unknown
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