atmega163l ATMEL Corporation, atmega163l Datasheet - Page 56
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atmega163l
Manufacturer Part Number
atmega163l
Description
Atmega163 8-bit Avr Microcontroller With 16k Bytes Of In-system Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
1.ATMEGA163L.pdf
(187 pages)
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ATmega163(L)
Figure 39. Effects of Unsynchronized OCR Latching in Overflow Mode.
During the time between the write and the latch operation, a read from OCR2 will read
the contents of the temporary location. This means that the most recently written value
always will read out of OCR2.
When the Output Compare Register contains $00 or $FF, and the up/down PWM mode
is selected, the output PD7(OC2) is updated to low or high on the next compare match
according to the settings of COM21/COM20. This is shown in Table 22. In overflow
PWM mode, the output PD7(OC2) is held low or high only when the Output Compare
Register contains $FF.
Table 22. PWM Outputs OCR2 = $00 or $FF
In up/down PWM mode, the Timer Overflow Flag – TOV2, is set when the counter
changes direction at $00. In overflow PWM mode, the Timer Overflow Flag is set as in
normal Timer/Counter mode. The Timer Overflow Interrupt operates exactly as in nor-
mal Timer/Counter mode, i.e., it is executed when TOV2 is set provided that Timer
Overflow Interrupt and Global Interrupts are enabled. This also applies to the Timer Out-
put Compare Flag and Interrupt.
The frequency of the PWM will be Timer Clock Frequency divided by 510.
COM21
1
1
1
1
Unsynchronized OC2 Latch
Synchronized OC2 Latch
COM20
0
0
1
1
Compare Value changes
OCR2
$FF
$FF
Glitch
$00
$00
Compare Value changes
Counter Value
Compare Value
PWM Output OC2
Counter Value
Compare Value
PWM Output OC2
Output OC2
H
H
L
L
1142E–AVR–02/03
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