aduc7032 Analog Devices, Inc., aduc7032 Datasheet - Page 36

• Manufacturer Part Number: aduc7032
• Description: Microconverter Integrated, Precision Battery Sensor
• Manufacturer: Analog Devices, Inc.

Preliminary Technical Data
In Summary, there are three levels of protection:
Sequence to write the key and set permanent protection:
1.
2.
3.
4.
To remove or modify the protection the same sequence can be
used with a modified value of FEExPRO.
The sequence above is illustrated in the following example, this
protects writing pages 4 and 5of the FLASH:
FEExPRO =0xFFFFFFFB;
FEExADR =0x66BB;
FEExDAT =0xAA55;
FEExMOD = 0x0048
FEExCON = 0x0C;
while (FEExSTA & 0x04){}
- Temporary Protection can be set and removed by writing
- Keyed Permanent Protection can be set via FEExPRO
- Permanent Protection can be set via FEExPRO, similarily
protected.
31-16 ] and FEExDAT [ Bits 15-0 ].
Write in FEExPRO corresponding to the pages to be
Write the new (user defined) 32 bit key in FEExADR [ Bits
Write 1,0 in FEExMOD[6:5] and set FEExMOD[3].
Run the write key command 0x0C in FEExCON.
directly into FEExHID MMR. This register is volatile and
therefore protection will only be in place while the part
remains powered on. This protection is not reloaded after
a power cycle.
which is used to lock the protection configuration. The
software key used at the start of the required FEExPRO
write sequence is saved once and MUST subsequently be
used for any subsequent access of the FEExHID or
FEExPRO MMRs. A mass erase will set the key back to
0xFFFF but will also erase the entire user code space.
to Keyed Permanent Protection, the only difference been
that the software key used is 0xDEADDEAD. Once the
FEExPRO write sequence is saved, only a mass erase will
set the key back to 0xFFFFFFFF. This will also erase the
entire user code space.
//Wait for command to finish
//Protect pages 4 and 5
//32 bit key value [Bits 31-16]
//32 bit key value [Bits 15-0]
// Lock Security Sequence
// Write key command
Rev. PrD | Page 36 of 128
FLASH/EE MEMORY RELIABILITY
The Flash/EE memory array on the part is fully qualified for
two key Flash/EE memory characteristics: Flash/EE memory
cycling endurance and Flash/EE memory data retention.
Endurance quantifies the ability of the Flash/EE memory to be
cycled through many program, read, and erase cycles. A single
endurance cycle is composed of four independent, sequential
events, defined as:
1. Initial page erase sequence.
2. Read/verify sequence a single Flash/EE.
3. Byte program sequence memory.
4. Second read/verify sequence endurance cycle.
In reliability qualification, every half word (16-bit wide)
location of the three pages(top, middle and bottom) in the
Flash/EE memory is cycled 10,000 times from 0x0000 to
0xFFFF. As indicated in Table 1, the parts’ Flash/EE memory
endurance qualification is carried out in accordance with
JEDEC Retention Lifetime Specification A117 . the results allow
the specification of a minimum endurance figure over supply,
temperature of 10,000 cycles.
Retention quantifies the ability of the Flash/EE memory to
retain its programmed data over time. Again, the parts is
qualified in accordance with the formal JEDEC Retention
Lifetime Specification (A117) at a specific junction temperature
(T
Flash/EE memory is cycled to its specified endurance limit,
described previously, before data retention is characterized.
This means that the Flash/EE memory is guaranteed to retain
its data for its fully specified retention lifetime every time the
Flash/EE memory is reprogrammed. Also note that retention
lifetime, based on an activation energy of 0.6 eV, derates with T
as shown in Figure 12.
J
= 85°C). As part of this qualification procedure, the
600
450
300
150
0
30
Figure 12. Flash/EE Memory Data Retention
40
JUNCTION TEMPERATURE (°C)
55
70
85
100
125
ADuC7032
135
150
J