aduc7032 Analog Devices, Inc., aduc7032 Datasheet - Page 118

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aduc7032

Manufacturer Part Number
aduc7032
Description
Microconverter Integrated, Precision Battery Sensor
Manufacturer
Analog Devices, Inc.
Datasheet

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Preliminary Technical Data
LIN Hardware Synchronization Control Register 1:
Name :
Address :
Default Value :
Access :
Function :
LIN Hardware Synchronization Timer0 Register :
Name :
Address :
Default Value :
Access :
Function :
0
Bit
7-4
3-0
LHS Reset Bit
This bit is cleared to 0 by user code to enable the LHS logic to function normally
This bit is set to 1 by user code to reset all LHS logic to default conditions, the bit is cleared to 0 automatically in
hardware.
Description
LIN STOP Edge Count
These 4 bits are set by user code to the number of falling or rising edges on which to stop the internal LIN
synchronization counter. The stop value of this counter can be read by user code via LHSVAL0. The type of edge, either
rising or falling, is configured by LHSCON0[7]. The default value of these bits is 0x3 which configures the hardware to
stop counting on the third falling edge. It should be noted that the first falling edge is taken as the falling edge at the
start of the LIN break pulse.
LIN START Edge Count
These 4 bits are set by user code to the number of falling edges after which the internal LIN synchronization timer will
start counting. The stop value of this counter can be read by user code via LHSVAL0. The default value of these bits is 0x2
which configures the hardware to start counting on the second falling edge. It should be noted that the first falling edge
is taken as the falling edge at the start of the LIN break pulse.
LHSCON1
0xFFFF078C
0x32
Read/Write
The LHS Control register is an 8-bit register that in conjunction with the LHSCON0 register is used to configure the
LIN mode of operation.
LHSVAL0
0xFFFF0788
0x0000
Read/Write
The 16-bit read only LHSVAL0 register holds the value of the internal LIN synchronization timer. The
LIN synchronization timer is clocked from an internal 5MHz clock which is independent of Core clock and baud-rate
frequency. In LIN mode, the value read by user code from the LHSVAL0 register can be used calculate the master LIN
baud-rate. This calculation can then be used to configure the internal UART baud-rate to ensure correct LIN
communication via the UART from the ADuC7032 slave to the LIN master node.
Table 83 : LHSCON1 MMR Bit Descriptions
Rev. PrD | Page 118 of 128
ADuC7032

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