aduc7032 Analog Devices, Inc., aduc7032 Datasheet - Page 103
aduc7032
Manufacturer Part Number
aduc7032
Description
Microconverter Integrated, Precision Battery Sensor
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADUC7032.pdf
(128 pages)
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Preliminary Technical Data
High Voltage Monitor Register :
Name :
Address :
Default Value :
Access :
Function :
Bit
7
6
5
4
3
2
1
0
Description
WU Pin Diagnostic Read-back
Once enabled via HVCFG1[4], this read only bit will reflect the state of the external WU pin.
Over Temperature
This bit will be 0 if a thermal shutdown event has not occurred.
This bit will be 1 if a thermal shutdown event has occurred.
Reserved
This bit should not be used and is reserved for future use.
Buffer Enabled
This bit will be 0 if the Voltage Channel ADC input buffer is disabled
This bit will be 1 if the Voltage Channel ADC input buffer is enabled
Low Voltage Flag Status Bit (Only valid If enabled via HVCFG0[2])
This bit will be 0 on power-on if REG_DVDD had dropped below 2.1V. In this state, RAM contents can be deemed corrupt.
This bit will be 1 on power-on if REG_DVDD had not dropped below 2.1V. In this state, RAM contents can be deemed valid. It will
only be cleared by re-enabling the Low Voltage Flag in HVCFG0[2]
LIN Short Circuit Status Flag:
This bit will be 0 if the LIN driver is operating normally.
This bit will be 1 if the LIN driver has experienced a short circuit condition and will be cleared automatically by writing to
HVCFG1[3].
Reserved
These bits should not be used and are reserved for future use.
Wake Short Circuit Status Flag:
This bit will be 0 if the Wake driver is operating normally.
This bit will be 1 is the Wake driver has experienced a short circuit condition.
HVMON
Indirectly addressed via the HVCON high voltage interface
0x00
Read Only
This 8-bit read only register reflects the current status of enabled high voltage related circuits and functions on the
ADuC7032. This register is not an MMR and does not appear in the MMR memory map. It is accessed via the
HVCON registered interface, and data is read back from this register via HVDAT.
Table 67: HVMON Bit Designations
Rev. PrD | Page 103 of 128
ADuC7032