aduc7032 Analog Devices, Inc., aduc7032 Datasheet - Page 32

• Manufacturer Part Number: aduc7032
• Description: Microconverter Integrated, Precision Battery Sensor
• Manufacturer: Analog Devices, Inc.

Preliminary Technical Data
- FEExPRO (x= 0 or 1): A buffer of the FEEHIDE register,
NOTE:
FEE0CON and FEE1CON Registers :
Name :
Address :
Default Value (both registers) :
Access :
Function :
*
Code
0x00
0x01*
0x02*
0x03*
0x04*
0x05*
0x06*
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
The FEExCON will always read 0x07 immediately after execution of any of these commands.
which is used to store the FEEHIDE value, so it is
automatically downloaded to the FEEHIDE registers on
subsequent reset and power-on events.
*
User Software must ensure that the Flash/EE memory
controller has completed any Erase or Write cycle
before the PLL is powered down. If the PLL is
powered down before an Erase or Write cycle is
Command
Reserved
Single Read
Single Write
Erase-Write
Single Verify
Single Erase
Mass erase
Reserved
Reserved
Reserved
Signature
Protect
Reserved
Reserved
Ping
These 8-bit registers are written by user code to control the operating modes of the Flash/EE memory controllers for
Block0 (32KB) and Block1 (64KB).
Description (note x is 0 or 1 to designate Flash/EE Block 0 or 1)
Reserved, this command should not be written by user code
Load FEExDAT with the 16-bit data indexed by FEExADR
Write FEExDAT at the address pointed by FEExADR. This operation takes 50 s.
Erase the page indexed by FEExADR and write FEExDAT at the location pointed by FEExADR. This
operation takes 20ms
Compare the contents of the location pointed by FEExADR to the data in FEExDAT. The result of the
comparison is returned in FEExSTA bit 1
Erase the page indexed by FEExADR
Erase Block0(30kByte) or Block1(64kByte) of user space. The 2kByte Kernel is protected. This operation
takes 1.2s To prevent accidental execution, a command sequence is required to execute this instruction,
this is described below.
Default command.
Reserved, this command should not be written by user code
Reserved, this command should not be written by user code
Reserved, this command should not be written by user code
FEE0CON:
This command will result in a 24-bit LFSR based signature been generated and loaded into FEE0SIG.
If FEE0ADR is less than 0x97800, this command will result in a 24 bit LFSR based signature of the user code
space from the page specified in FEE0ADR upwards, including the Kernel, security bits and Flash/EE key.
If FEE0ADR is greater than 0x97800, the Kernel and manufacturing data is signed
FEE1CON:
This command will result in a 24-bit LFSR based signature been generated, beginning at FEE1ADR and
ending at the end of the 63.5k Block, and loaded into FEE1SIG. The last page of this block is not included
in the Sign generation.
erase (0x06) or with the key
Reserved, this command should not be written by user code
Reserved, this command should not be written by user code
No operation, interrupt generated
This command can be run only once. The value of FEExPRO is saved and can be removed only with a mass
FEE0CON and FEE1CON
0xFFFF0E08 and 0xFFFF0E88
0x07
Read/Write Access
Table 11: Command Codes in FEE0CON and FEE1CON
Rev. PrD | Page 32 of 128
The following sections describe in detail the bit designations of
each of Flash/EE control MMRs
completed, the Flash/EE page or byte may be
corrupted.
ADuC7032