adm1075-2aruz-rl7 Analog Devices, Inc., adm1075-2aruz-rl7 Datasheet - Page 4

• Manufacturer Part Number: adm1075-2aruz-rl7
• Description: −48 V Hot Swap Controller And Digital Power Monitor With Pmbus Interface
• Manufacturer: Analog Devices, Inc.

ADM1075
GENERAL DESCRIPTION
The
ler with constant power foldback and high accuracy digital current
and voltage measurement that allows boards to be safely inserted
and removed from a live −48 V backplane. The part provides
precise and robust current limiting and protection against both
transient and nontransient short circuits and overvoltage and
undervoltage conditions. The
a negative voltage of −35 V to −80 V and, due to shunt regulation,
has excellent voltage transient immunity. The operating range of
the part is flexible due to the shunt regulator, and the part can be
powered directly by a 10 V rail to save shunt power dissipation
(see the Powering the ADM1075 section for more details).
A full-scale current limit of 25 mV or 50 mV can be selected by
choosing the appropriate model. The maximum current limit is
set by the combination of the sense resistor, R
voltage on the ISET pin, using external resistors. This allows fine
tuning of the trip voltage so that standard sense resistors can be
used. Inrush current is limited to this programmable value by
controlling the gate drive of an external N-channel FET. A built-
in soft start function allows control of the inrush current profile by
an external capacitor on the soft start (SS) pin.
An external capacitor on the TIMER pin determines the maxi-
mum allowed on-time for when the system is in current limit.
This is based on the safe operating area (SOA) limits of the
MOSFET. A constant power foldback scheme is used to control
the power dissipation in the MOSFET during power-up and
fault conditions. The
cally to ensure that the power in the MOSFET is within SOA
limits as V
shuts down the MOSFET. The level of this power, along with
the TIMER regulation time, can be set to ensure that the
MOSFET remains within the SOA limits.
The
when the LATCH pin is tied to the SHDN pin. In this mode,
if the load current reaches the limit, the FET gate is pulled low
after the timer expires and retries after a cooling period for
seven attempts only. If the fault remains, the device latches off,
and the MOSFET is disabled until a manual restart is initiated.
Alternatively, the
isolating the
also be configured to retry an infinite number of times with a
10 second interval between restarts by connecting the GPO2
pin to the RESTART pin.
ADM1075
ADM1075
DS
LATCH pin from the SHDN pin. The part can
changes. After the timer has expired, the device
is a full feature, negative voltage, hot swap control-
employs a limited consecutive retry scheme
ADM1075
ADM1075
can be set to retry only once by
ADM1075
regulates the current dynami-
typically operates from
SENSE
, and the input
Rev. 0 | Page 4 of 52
The
and overvoltage detection. The FET is turned off if a nontransient
voltage less than the undervoltage threshold (typically −35 V) is
detected on the UVx pins or if greater than the overvoltage
threshold (typically −80 V) is detected on the OV pin. The
operating voltage range of the
resistor networks on the UVx and OV pins. The hysteresis levels
on the overvoltage detectors can also be altered by selecting the
appropriate resistors. There are two separate UVx pins to allow
accurate programming of hysteresis.
In the case of a short circuit, the
circuit to detect and respond adequately to this event. If the
sense voltage exceeds 1.5 times the normal current limit, a high
current (750 mA minimum) gate pull-down switch is activated
to shut down the MOSFET as quickly as possible. There is a
default internal glitch filter of 900 ns. If a longer filter time or
different severe overcurrent limit is required, these parameters
can be adjusted via the PMBus™ interface.
The
measurement of the voltage and load current. The current is
measured at the output of the internal current sense amplifier
and the voltage from the ADC_V input. This data can be read
across the PMBus interface.
The PMBus interface allows a controller to read current, voltage,
and power measurements from the ADC. Measurements can be
initiated by a PMBus command or can be set up to run continu-
ously. The user can read the latest conversion data whenever it
is required. A power accumulator is also provided to report
total power consumed in a user specified period (total energy).
Up to four unique I
the configuration of the ADR pin.
The GPO1/ ALERT1 /CONV and GPO2/ ALERT2 outputs can
be used as a flag to warn a microcontroller or FPGA of one or
more fault/warning conditions becoming active. The fault type
and level is programmed across the PMBus, and the user can
select which faults/warnings activate the alert.
Other functions include
•
•
•
ADM1075
ADM1075
PWRGD output, which can be used to enable a power
module (the DRAIN and GATE pins are monitored to
determine when the load capacitance is fully charged)
SHDN input to manually disable the GATE drive
RESTART input to remotely initiate a 10 second shutdown
has separate UVx and OV pins for undervoltage
also includes a 12-bit ADC to provide digital
2
C addresses can be created, depending on
ADM1075
ADM1075
is programmable via
has a fast response
Data Sheet