adm1075-2aruz-rl7 Analog Devices, Inc., adm1075-2aruz-rl7 Datasheet - Page 31

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adm1075-2aruz-rl7

Manufacturer Part Number
adm1075-2aruz-rl7
Description
−48 V Hot Swap Controller And Digital Power Monitor With Pmbus Interface
Manufacturer
Analog Devices, Inc.
Datasheet
Data Sheet
HOT SWAP CONTROL COMMANDS
OPERATION Command
The GATE pin that drives the FET is controlled by a dedicated
hot swap state machine. The UVH, UVL, and OV input pins,
along with the TIMER and SS pins and the current sense, all
feed into the state machine and control when and how strongly
the gate is turned off.
It is also possible to control the hot swap GATE output using
commands over the PMBus interface. The OPERATION com-
mand can be used to request the hot swap output to turn on.
However, if the UV pin indicates that the input supply is less
than required, the hot swap output is not turned on, even if the
OPERATION command indicates that the output should be
enabled.
If the OPERATION command is used to disable the hot swap
output, the GATE pin is held low, even if all hot swap state
machine control inputs indicate that it can be enabled.
The default state of the OPERATION command ON bit is 1;
therefore, the hot swap output is always enabled when the
ADM1075
the UV input is the hot swap master on/off control signal.
By default, at power-up, the OPERATION command is disabled
and must be enabled using the DEVICE_CONFIG command.
This prevents inadvertent shutdowns of the hot swap controller
by software.
If the ON bit is set to 0 while the UV signal is high, the hot swap
output is turned off. If the UV signal is low or if the OV signal is
high, the hot swap output is already off and the status of the ON
bit has no effect.
If the ON bit is set to 1, the hot swap output is requested to turn
on. If the UV signal is low or if the OV signal is high, setting the
ON bit to 1 has no effect, and the hot swap output remains off.
It is possible to determine at any time whether the hot swap output
is enabled using the STATUS_BYTE or the STATUS_WORD
command (see the Status Commands section).
The OPERATION command can also be used to clear any latched
faults in the status registers. To clear latched faults, set the ON
bit to 0, and then reset it to 1.
DEVICE_CONFIG Command
The DEVICE_CONFIG command is used to configure certain
settings within the ADM1075, for example, to modify the
duration of the severe overcurrent glitch filter and to set the trip
threshold. This command is also used to configure the polarity
of the second IOUT current warnings.
At power-up, the OPERATION command is disabled, and
the
command is received. To allow use of the OPERATION
command, the OPERATION_CMD_EN bit must be set
using the DEVICE_CONFIG command.
ADM1075
comes out of UVLO. If the ON bit is never changed,
responds with a NACK if the OPERATION
Rev. 0 | Page 31 of 52
POWER_CYCLE Command
The POWER_CYCLE command can be used to request that
the
This command can be useful if the processor that controls the
ADM1075
command allows the processor to request that the
off and back on again as part of a single command.
ADM1075 INFORMATION COMMANDS
CAPABILITY Command
The CAPABILITY command can be used by host processors
to determine the I
The features reported are the maximum bus speed and whether
the device supports the packet error checking (PEC) byte and
the SMBAlert reporting function.
PMBUS_REVISION Command
The PMBUS_REVISION command reports the version of Part I
and Part II of the PMBus standard.
MFR_ID, MFR_MODEL, and MFR_REVISION Commands
The MFR_ID, MFR_MODEL, and MFR_REVISION
commands return ASCII strings that can be used to facilitate
detection and identification of the
These commands are read using the SMBus block read message
type. This message type requires that the
byte count corresponding to the length of the string data that is
to be read back.
STATUS COMMANDS
The
to report faults and warnings from the hot swap controller and
the power monitor. These status bits are located in six different
registers that are arranged in a hierarchy. The STATUS_BYTE
and STATUS_WORD commands provide eight bits and 16 bits
of high level information, respectively. The STATUS_BYTE and
STATUS_WORD commands contain the most important status
bits, as well as pointer bits that indicate whether any of the four
other status registers need to be read for more detailed status
information.
In the ADM1075, a particular distinction is made between
faults and warnings. A fault is always generated by the hot swap
controller and is defined by hardware component values. Three
events can generate a fault.
When a fault occurs, the hot swap controller always takes some
action, usually to turn off the GATE pin, which is driving the
FET. A fault can also generate an SMBAlert on one or both of
the GPOx/ ALERTx pins.
ADM1075
ADM1075
Overcurrent condition that causes the hot swap timer to
time out
Overvoltage condition on the OV pin
Undervoltage condition on the UVx pin
is also powered off when the part is turned off. This
be turned off for ~10 seconds and then back on.
provides a number of status bits that are used
2
C bus features supported by the ADM1075.
ADM1075
ADM1075
on the bus.
ADM1075
ADM1075
return a
turn

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