adm1075-2aruz-rl7 Analog Devices, Inc., adm1075-2aruz-rl7 Datasheet - Page 37

• Manufacturer Part Number: adm1075-2aruz-rl7
• Description: −48 V Hot Swap Controller And Digital Power Monitor With Pmbus Interface
• Manufacturer: Analog Devices, Inc.

Data Sheet
SMBus ALERT RESPONSE ADDRESS
The SMBus alert response address (ARA) is a special address
that can be used by the bus host to locate any devices that need
to talk to it. A host typically uses a hardware interrupt pin to
monitor the SMBus alert pins of a number of devices. When the
host interrupt occurs, the host issues a message on the bus using
the SMBus receive byte or receive byte with PEC protocol.
The special address used by the host is 0x0C. Any devices that
have an SMBAlert signal return their own 7-bit address as the
seven MSBs of the data byte. The LSB value is not used and can
be either 1 or 0. The host reads the device address from the
received data byte and proceeds to handle the alert condition.
More than one device may have an active SMBAlert signal and
attempt to communicate with the host. In this case, the device
with the lowest address dominates the bus and succeeds in
transmitting its address to the host. The device that succeeds
disables its SMBusAlert signal. If the host sees that the SMBus
alert signal is still low, it continues to read addresses until all
devices that need to talk to it have successfully transmitted their
addresses.
EXAMPLE USE OF SMBus ALERT RESPONSE
ADDRESS
The full sequence of steps that occurs when an SMBAlert is
generated and cleared is as follows:
1.
2.
3.
A fault or warning is enabled using the ALERT1_CONFIG
command, and the corresponding status bit for the fault or
warning goes from 0 to 1, indicating that the fault/warning
has just become active.
The GPO1/ ALERT1 /CONV or GPO2/ ALERT2 pin
becomes active (low) to signal that an SMBAlert is active.
The host processor issues an SMBus alert response address
to determine which device has an active alert.
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4.
5.
6.
DIGITAL COMPARATOR MODE
The GPO1/ ALERT1 /CONV and GPO2/ ALERT2 pins can be
configured to indicate if a user defined threshold for voltage,
current, or power is being exceeded. In this mode, the output
pin is live and is not latched when a warning threshold is
exceeded. In effect, the pin acts as a digital comparator where
the threshold is set using the warning limit threshold commands.
The ALERTx_CONFIG command is used, as for the SMBAlert
configuration, to select the specific warning threshold to be
monitored. The GPO1/ ALERT1 /CONV or GPO2/ ALERT2 pin
then indicates if the measured value is above or below the
threshold.
If there are no other active alerts from devices with lower
I
or GPO2/ ALERT2 pin inactive (high) during the NACK
bit period after it sends its address to the host processor.
If the GPO1/ ALERT1 /CONV or GPO2/ ALERT2 pin stays
low, the host processor must continue to issue SMBus alert
response address commands to devices to find out the
addresses of all devices whose status it must check.
The
CONV or GPO2/ ALERT2 pin inactive and the contents of
the status bytes unchanged until the host reads the status
bytes and clears them, or until a new fault occurs. That is, if
a status bit for a fault/warning that is enabled on the
GPO1/ ALERT1 /CONV or GPO2/ ALERT2 pin and that
was not already active (equal to 1) goes from 0 to 1, a new
alert is generated, causing the GPO1/ ALERT1 /CONV or
GPO2/ ALERT2 pin to become active again.
2
C addresses, this device makes the GPO1/ ALERT1 /CONV
ADM1075
continues to operate with the GPO1/ ALERT1 /
ADM1075