peb20954 Infineon Technologies Corporation, peb20954 Datasheet - Page 99

• Manufacturer Part Number: peb20954
• Description: Smart Integrated Digital Echo Canceller Sidec
• Manufacturer: Infineon Technologies Corporation

UCCALIGN[7:0] (Addr.: 10H): UCC frame alignment,write protected, Reset value = 00H
UCCALIGN[7:0]
PHALIGN[7:0] (Addr. 11H): Bit Phase alignment for RI, SI, SO and UCC, write
protected, Reset value = 00H,
UCCPHALIGN[1:0]Determines the valid bit phase of the UCC frame bit (starting with
SOPHALIGN[1:0] Determines the valid bit phase of the send output frame bit (starting
SIPHALIGN[1:0]
RIPHALIGN[1:0]
ASTOC[7:0] (Addr.:70H): AFI Saw-Tooth and Offset Characteristic, write protected,
Reset value = 00H
Low frequency components are superimposed to the Receive In AFI input signal to
increase stability. Under normalconditions this superimposition is not necessary.
STRISE[2:0]
Preliminary Data Sheet
ALIGN[7]
ALIGN[1]
UCCPH
RISE[2]
UCC
ST
ALIGN[6]
ALIGN[0]
UCCPH
RISE[1]
UCC
ST
Determines the valid frame bit of the UCC frame (starting with bit 7
channel 0) at the first falling SCLKI edge, with which an active SYNCI
impulse is detected. (00H = bit 7, channel 0; FFH = bit 0, channel
31). For explanation see Figure 25.
phase 0) at the first falling SCLKI edge, with which an active SYNCI
impulse is detected. ("00" = bit phase 0, "11" = bit phase 3)
For explanation see Figure 25.
with phase 0) at the first falling SCLKI edge, with which an active
SYNCI impulse is detected. ("00" = bit phase 0, "11" = bit phase 3)
For explanation see Figure 19.
Determines the valid bit phase of the send input frame bit (starting
with phase 0) at the first falling SCLKI edge, with which an active
SYNCI impulse is detected. ("00" = bit phase 0, "11" = bit phase 3)
For explanation see Figure 19.
Determines the valid bit phase of the receive input frame bit (starting
with phase 0) at the first falling SCLKI edge, with which an active
SYNCI impulse is detected. ("00" = bit phase 0, "11" = bit phase 3)
For explanation see Figure 19.
Saw-tooth rising clock frequency
ALIGN[5]
ALIGN[1]
RISE[0]
SOPH
UCC
ST
ALIGN[4]
ALIGN[0]
FALL[2]
SOPH
UCC
ST
99
ALIGN[3]
ALIGN[1]
FALL[1]
SIPH
UCC
ST
ALIGN[2]
ALIGN[0]
FALL[0]
SIPH
UCC
ST
Register Description
ALIGN[1]
ALIGN[1]
AMPL[1] AMPL[0]
RIPH
UCC
PEB 20954
PEF 20954
ALIGN[0]
ALIGN[0]
RIPH
UCC
04.99