peb20954 Infineon Technologies Corporation, peb20954 Datasheet - Page 72

• Manufacturer Part Number: peb20954
• Description: Smart Integrated Digital Echo Canceller Sidec
• Manufacturer: Infineon Technologies Corporation

Preliminary Data Sheet
CUFAIL
AFI3FAIL
AFI2FAIL
AFI1FAIL
AFI0FAIL
The bits CUFAIL, AFI3FAIL, AFI2FAIL,AFI1FAIL and AFI0FAIL are read only.
5.2.3
All Write Registers are Write Only Registers and cannot be read out.
CTRLTSMON[6:0] (Addr.: 2FH): Control of TS to be monitored, Reset value = 00H
SNAPSHOT
MVAL
MCH[4:0]
If MVAL = ’1’ the Monitor Read Registers are filled with the values of timeslot MCH[4:0]
as soon as this timeslot is processed. The availibility of the monitored values in the
Monitor Read Registers is indicated by setting the bit IRREQ.TSM and STATUS.TSM.
-
Write Register
SNAP
SHOT
’1’: RAMBIST of central unit failed, i.e. a RAM error was detected
’0’: RAMBIST of central unit succesful: no error in RAM
’1’: RAMBIST of adaptive filter unit 3 failed, i.e. a RAM error was
’0’: RAMBIST of adaptive filter unit 3 succesful: no error in RAM
’1’: RAMBIST of adaptive filter unit 2 failed, i.e. a RAM error was
’0’: RAMBIST of adaptive filter unit 2 succesful: no error in RAM
’1’: RAMBIST of adaptive filter unit 1 failed, i.e. a RAM error was
’0’: RAMBIST of adaptive filter unit 1 succesful: no error in RAM
’1’: RAMBIST of adaptive filter unit 0 failed, i.e. a RAM error was
’0’: RAMBIST of adaptive filter unit 0 succesful: no error in RAM
’1’: Values of the monitor registers are only updated after writing to
’0’: Values of the monitor registers are continuously updated (each
’0’: resets the interrupt condition for TSMPOLL in the STATUS
’1’: starts request for monitoring of the timeslot defined by MCH[4:0].
selects the timeslot (channel) to be monitored
the value RESULT is valid, if the RAMBIST was activated before
detected
detected
detected
detected
this register with MVAL set to ’1’. The data remains stored in the
monitor registers. An interrupt is generated as soon as the
monitor values are valid. STATUS.TSMPOLL is cleared only
when a new request is started by access to MVAL.
time the timeslot MCH[4:0] is detected) if MVAL = ’1’.
An interrupt is generated only once and as soon as data becomes
available in the monitor registers.
register. Stops updating of values if SNAPSHOT = ’0’
MVAL
MCH[4]
72
MCH[3]
MCH[2]
Register Description
MCH[1]
PEB 20954
PEF 20954
MCH[0]
04.99