peb20954 Infineon Technologies Corporation, peb20954 Datasheet - Page 49
peb20954
Manufacturer Part Number
peb20954
Description
Smart Integrated Digital Echo Canceller Sidec
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB20954.pdf
(132 pages)
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4.3.6
Figure 25
Note: Above values are examples only. For the use of the UCC Interface a SYNCI signal
with a period of 4 ms (equivalent to one multiframe) must be applied to the SIDEC. UCC
frame and multiframe alignment with respect to the first detection of an active SYNCI
Preliminary Data Sheet
TUCCO
TUCCO
TUCCO
SYNCI
SYNCI
SYNCI
SCLKI
UCCO
SCLKI
UCCO
SCLKI
UCCO
UCCI
UCCI
UCCI
30 31 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 0 1 2 3 4 5 6 7 8 9 10 11 12
30 31 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 0 1 2 3 4 5 6 7 8 9 10 11 12
UCC Interface Signal Timing and Frame Alignment
channel 31, frame 3
channel 31, frame 3
Bit 2
Bit 0
Bit 0
UCC Interface Signal Timing and Frame Alignment
Bit 1
sampling of UCCI at the
beginning of phase 2
Phase 0
Phase 0
Bit 0
Phase 1
Phase 1
Bit 7
Bit 7
Phase 2
Phase 2
Bit 6
Bit 6
Phase 3
Phase 3
Bit 5
Bit 5
49
4 ms
Register UCCMFR = 05H (next frame = frame 5)
channel 0, frame 4
channel 0, frame 4
Phase 0
Bit 4
Bit 4
Register UCCALIGN = 01H,
Register PHALIGN[7:6] = "00"
Phase 1
Bit 3
Bit 3
Phase 2
Bit 6
Bit 2
Bit 2
Operational Description
Phase 3
Bit 1
Bit 1
Bit 0
Bit 0
PEB 20954
PEF 20954
Bit 5
Bit 5
Bit 7
04.99
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