peb20954 Infineon Technologies Corporation, peb20954 Datasheet - Page 33

• Manufacturer Part Number: peb20954
• Description: Smart Integrated Digital Echo Canceller Sidec
• Manufacturer: Infineon Technologies Corporation

4.2
The SIDEC can be connected in different synchronization and clock modes. These
modes can be used for several applications.
Basically there are two clock modes, slave and master clock mode (not to be mixed up
with 128 ms master and slave mode). The internal clock system in master clock mode is
automatically synchronized to the system clock by using an external 32.768 MHz VCO
or by generating and deriving the system clock at output pin SCLKO directly from the
CLK32 input. SIDEC in master clock mode provides a synchronization pulse at pin
SDECO. This pulse can be used by a SIDEC in slave clock mode to synchronize its
internal clock system to the system clock without the needs for additional external VCO.
Examples for this mode are the 128 ms delay application and the multiple SIDEC
application, see also Figure 16 and Figure 17.
CLK4O is 4.096 MHz system clock output for subsequent circuits, derived from SCLKI.
Figure 12
In Figure 12 the system clock is reconnected from SCLKO to SCLKI in order to properly
process the PCM signals. The system clock at pin SCLKO can also be provided for other
devices. The SDECI pin is not connected in the master clock mode. A 32.768 MHz clock
has to be provided by an external clock oscillator or other clock source on the system.
Preliminary Data Sheet
8.192MHz
SCLKO
SDECI n.c.
SCLKI
Synchronization and Clock Modes
MHz System Clock Input
Master Clock Mode with External 32.768 MHz Clock without 8.192
SIDEC
33
Operational Description
SDECO (to slave)
CLK4O
PEB 20954
PEF 20954
04.99