peb20954 Infineon Technologies Corporation, peb20954 Datasheet - Page 46
peb20954
Manufacturer Part Number
peb20954
Description
Smart Integrated Digital Echo Canceller Sidec
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB20954.pdf
(132 pages)
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Preliminary Data Sheet
4.3.4
Figure 23
In case a 32.768 MHz clock has to be generated and synchronized to the system clock
at SCLKI, the signal at pin CTRL32 can be used to control an external VCO. The output
at CTRL32 is the signal at SCLKI that is internally ’xored’ with an internal 8.192 MHz
clock that is derived from the signal pin CLK32 by division by 4. For proper operation of
the SIDEC the system clock SCLKI and the internal 8.192 MHz clock must lock in within
the capture range from 0 to 180 . CTRL32 can be inverted by bit CONFCC.INVCTRL32
for use of VCOs that increase the frequency with falling voltage.
The internal 8.192 MHz clock can be monitored at pin SCLKO with a delay of three
CLK32 periods plus internal signal delay if pin CLK32SEL is set to logic ’1’.
Lock-in at 180°
Lock-in at 90°
Lock-in at 0°
internal 8Mhz clock
internal 8Mhz clock
internal 8Mhz clock
CTRL32
CTRL32
CTRL32
CLK32
CLK32
CLK32
SCLKI
Clock Timing within External VCO Capture Range
Clock Timing within External VCO Capture Range
46
Operational Description
PEB 20954
PEF 20954
04.99
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