isp1582 NXP Semiconductors, isp1582 Datasheet - Page 53

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isp1582

Manufacturer Part Number
isp1582
Description
Hi-speed Universal Serial Bus Peripheral Controller
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
Table 79.
V
unless otherwise specified.
[1]
[2]
ISP1582_6
Product data sheet
Symbol Parameter
Data source timing
Full-speed mode
t
t
Receiver timing
Full-speed mode
t
t
t
t
FEOPT
FDEOP
JR1
JR2
FEOPR
FST
CC
Fig 13. Source differential data-to-EOP transition skew and EOP width
= 3.3 V 0.3 V; V
Excluding the first transition from the idle state.
Characterized only, not tested. Limits guaranteed by design.
T
Full-speed timing symbols have a subscript prefix ‘F’, low-speed timing symbols have a prefix 'L'.
source SE0 interval of EOP
source jitter for differential
transition to SE0 transition
receiver jitter to next transition
receiver jitter for paired transitions see
receiver SE0 interval of EOP
width of SE0 interval during
differential transition
PERIOD
3.3 V
Dynamic characteristics: analog I/O pins DP and DM
differential
data lines
0 V
is the bit duration corresponding to the USB data rate.
T
PERIOD
GND
= 0 V; T
crossover point
amb
N
= 40 C to +85 C; C
differential data to
SE0/EOP skew
T
PERIOD
Conditions
see
see
see
accepted as EOP; see
rejected as EOP; see
Rev. 06 — 20 September 2007
t
Figure 13
Figure 13
Figure 14
Figure 14
DEOP
L
= 50 pF; R
Figure 15
crossover point
…continued
Figure 13
extended
PU
= 1.5 k on DP to V
Hi-Speed USB Peripheral Controller
[2]
[2]
[2]
[2]
[2]
[2]
Min
160
82
-
source EOP width: t
receiver EOP width: t
2
18.5
9
TERM
Typ
-
-
-
-
-
-
; test circuit of
© NXP B.V. 2007. All rights reserved.
ISP1582
EOPT
EOPR
Max
175
+5
+18.5
+9
-
14
mgr776
Figure
Unit
ns
ns
ns
ns
ns
ns
53 of 69
22;

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