isp1563 NXP Semiconductors, isp1563 Datasheet - Page 64

• Manufacturer Part Number: isp1563
• Description: Hi-speed Universal Serial Bus Pci Host Controller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 93.
Address: Content of the base address register + 108h
[1]
Table 94.
Address: Content of the base address register + 108h
Table 95.
Address: Content of the base address register + 10Ch
ISP1563_2
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
31 to 8
7 to 0
Bit
Symbol
Reset
Access
The reserved bits should always be written with the reset value.
Symbol
reserved
OUT_DATA[7:0]
HceOutput - Host Controller Emulation Output register bit allocation
HceOutput - Host Controller Emulation Output register bit description
HceStatus - Host Controller Emulation Status register bit allocation
11.2.3 HceOutput register
11.2.4 HceStatus register
R/W
R/W
R/W
R/W
R/W
31
23
15
31
0
0
0
7
0
0
Data placed in this register by the emulation software is returned when I/O port 60h is
read and emulation is enabled. On a read of this location, OUT_FULL (bit 0 in HceStatus)
is set to logic 0. The bit allocation is given in
The contents of the HceStatus register are returned on an I/O read of port 64h when
emulation is enabled. Reads from and writes to port 60h, and writes to port 64h can cause
changes in this register. Emulation software can directly access this register through its
memory address in the Host Controller’s operational register space. Accessing this
register through its memory address produces no side effects.
allocation.
Description
-
Output Data: This register holds the data that is returned when an I/O read of port 60h is
requested by application software.
R/W
R/W
R/W
R/W
R/W
30
22
14
30
0
0
0
6
0
0
R/W
R/W
R/W
R/W
R/W
29
21
13
29
0
0
0
5
0
0
Rev. 02 — 15 March 2007
R/W
R/W
R/W
R/W
R/W
28
20
12
28
OUT_DATA[7:0]
0
0
0
4
0
0
reserved
reserved
reserved
reserved
[1]
[1]
[1]
[1]
R/W
R/W
R/W
R/W
R/W
27
19
11
27
Table
0
0
0
3
0
0
93.
R/W
R/W
R/W
R/W
R/W
26
18
10
26
0
0
0
2
0
0
HS USB PCI Host Controller
Table 95
R/W
R/W
R/W
R/W
R/W
25
17
25
0
0
9
0
1
0
0
© NXP B.V. 2007. All rights reserved.
shows the bit
ISP1563
R/W
R/W
R/W
R/W
R/W
64 of 102
24
16
24
0
0
8
0
0
0
0