isp1563 NXP Semiconductors, isp1563 Datasheet - Page 46

• Manufacturer Part Number: isp1563
• Description: Hi-speed Universal Serial Bus Pci Host Controller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 58.
Address: Content of the base address register + 1Ch
Table 59.
Address: Content of the base address register + 20h
ISP1563_2
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
31 to 4
3 to 0
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Symbol
PCED[27:0]
reserved
HcPeriodCurrentED - Host Controller Period Current Endpoint Descriptor register bit description
HcControlHeadED - Host Controller Control Head Endpoint Descriptor register bit allocation
11.1.9 HcControlHeadED register
15
31
23
15
R
R
R
R
R
R
0
7
0
0
0
0
7
0
The HcControlHeadED register contains the physical address of the first ED of the control
list. The bit allocation is given in
Description
Period Current ED: This is used by the Host Controller to point to the head of one of the periodic
lists that must be processed in the current frame. The content of this register is updated by the
Host Controller after a periodic ED is processed. The HCD may read the content in determining
which ED is being processed at the time of reading.
-
14
30
22
14
R
R
R
R
R
R
0
6
0
0
0
0
6
0
PCED[3:0]
CHED[3:0]
13
29
21
13
R
R
R
R
R
R
0
5
0
0
0
0
5
0
Rev. 02 — 15 March 2007
12
28
20
12
R
R
Table
R
R
R
R
0
4
0
0
0
0
4
0
CHED[27:20]
CHED[19:12]
PCED[11:4]
CHED[11:4]
59.
11
27
19
11
R
R
R
R
R
R
0
3
0
0
0
0
3
0
10
26
18
10
R
R
R
R
R
R
0
2
0
0
0
0
2
0
HS USB PCI Host Controller
reserved
reserved
25
17
R
R
R
R
R
R
9
0
1
0
0
0
9
0
1
0
© NXP B.V. 2007. All rights reserved.
ISP1563
46 of 102
24
16
R
R
R
R
R
R
8
0
0
0
0
0
8
0
0
0