dp83820 National Semiconductor Corporation, dp83820 Datasheet - Page 32
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dp83820
Manufacturer Part Number
dp83820
Description
10/100/1000 Mb/s Pci Ethernet Network Interface Controller
Manufacturer
National Semiconductor Corporation
Datasheet
1.DP83820.pdf
(87 pages)
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4.0 Register Set
4.1 Configuration Registers
The DP83820 implements a PCI version 2.2 configuration register space. This allows a PCI BIOS to "soft" configure the
DP83820. Software Reset has no effect on configuration registers. Hardware Reset returns all configuration registers to
their hardware reset state. For all unused registers, writes are ignored, and reads return 0.
4.1.1 Configuration Identification Register
This register identifies the DP83820 Controller to PCI system software.
31-16
15-0
bit
DEVID
VENID
tag
1Ch-28h
48-FFh
offset
0Ch
2Ch
3Ch
00h
04h
08h
10h
14h
30h
34h
38h
40h
44h
18
Offset: 00h
Tag: CFGID
Device ID
Vendor ID
CFGROM Boot ROM configuration register
description
CFGMA1
CAPPTR
CFGRID
CFGLAT
CFGIOA
CFGSID
CFGINT
CFGMA
CFGCS
PMCAP
CFGID
PMCS
tag
Table 4-1 Configuration Register Map
Configuration Identification Register
Configuration Command and Status Register
Configuration Revision ID Register
Configuration Latency Timer Register
Configuration IO Base Address Register
Configuration Memory Address Register
Configuration Memory Address High Dword Register
Reserved (reads return zero)
Configuration Subsystem Identification Register
Capabilities Pointer Register
Reserved (reads return zero)
Configuration Interrupt Select Register
Power Management Capabilities Register
Power Management Control and Status Register
Reserved (reads return zero)
Access: Read Only
This field is read-only and is set to the device ID assigned by NSC to the
DP83820, which is 0022h.
This field is read-only and is set to a value of 100Bh which is National
Semiconductor's PCI Vendor ID.
Size: 32 bits
32
description
usage
Hard Reset: 0022100B
Soft Reset: Unchanged
access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
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