dp83820 National Semiconductor Corporation, dp83820 Datasheet - Page 26

• Manufacturer Part Number: dp83820
• Description: 10/100/1000 Mb/s Pci Ethernet Network Interface Controller
• Manufacturer: National Semiconductor Corporation

3.0 Functional Description
3.13.3.2 Transmit Data Flow without Priority Queueing
In the DP83820 transmit architecture without Priority
Queueing, packet transmission involves the following
steps:
1. The device driver receives packets from an upper
2. An
3. The driver adds this descriptor to it’s internal list of
4. If the internal list was empty (this descriptor
5. The driver sets the TXEN bit in the CR register to
layer.
allocated. The fragment information is copied from
the NOS specific data structure(s) to the next
DP83820 transmit descriptor.
transmit descriptors awaiting transmission.
represents the only outstanding transmit packet),
then the driver must set the TXDP register to the
address of this descriptor, else the driver will append
this descriptor to the end of the list.
insure that the transmit state machine is active.
txAdvance
txDescRefr
available
XferDone
XferDone
txAdvance
DP83820
txDescWrite
link == NULL
link != NULL
CR:TXEN && CTDD
transmit
(Continued)
descCnt == 0 && (cmdsts & MORE)
Figure 3-16 Transmit State Diagram
descCnt == 0 && !(cmdsts & MORE)
descriptor
txIdle
txDescRead
txIdle
is
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6. If idle, the transmit state machine reads the descriptor
7. The state machine then moves through the fragment
8. When
txFifoBlock
into the TxDescriptorCache. If the OWN bit is not set,
the transmit state machine returns to idle to wait for
TXEN to be set again.
described within the descriptor, filling the TxDataFifo
with data. The hardware handles all aspects of byte
alignment; no alignment is assumed. Fragments
may start and/or end on any byte address. The
transmit state machine uses the fragment pointer
and the SIZE field from the cmdsts field of the
current descriptor to keep the TxDataFifo full. It also
uses the MORE bit and the SIZE field from the
cmdsts field of the current descriptor to know when
packet boundaries occur.
(successful or unsuccessful), the state machine
updates the cmdsts field of the current descriptor in
main memory (by bus-mastering a single 32-bit
word), relinquishing ownership, and indicating the
packet completion status. If more than one descriptor
TXDP <- txDescCache.link. Clear CTDD. Start a
burst transfer at address TXDP with a length
derived from TXCFG.
set CTDD. set ISR:TXIDLE.
XferDone && !OWN
a
txDescRead
packet
CR:TXEN && !CTDD
XferDone && OWN
FifoAvail
XferDone
has
|| link != NULL
completed
txFragRead
transmission
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