gc80c510 CORERIVER Semiconductor, gc80c510 Datasheet - Page 49

• Manufacturer Part Number: gc80c510
• Description: Eprom/rom 8-bit Turbo Microcontrollers
• Manufacturer: CORERIVER Semiconductor

MiDAS1.1 Family
[Related SFRs are: EXIF (External Interrupt Flag) and PCON (Power Control) Registers]
Figure
If the use of the power–fail features are desired in power-down mode (PCON[1] = 1), the BGS bit
(EXIF[0]), may be used. When BGS bit is set to logic 1 by software, the band–gap reference and
associated power monitor circuits will remain active in power-down mode. The price of this feature is
higher power supply current requirements. In power-down mode with the band–gap reference disabled,
the processor draws less than 1 μA. With the band–gap enabled, it draws approximately 180 μA.
Figure 6-7 LVD Block Diagram
Power-On/Fail reset and interrupt signal is generated when V
LVD block is alive after power-up. LVD block is off only when BGS = 0 and power-down mode.
EXIF[0]
PCON[4]
PCON[1]
6-6.
: (BGS) Band-gap Select (Default = 1).
: (POF) Power Off Fail. After POR (Power-On Reset), POF bit will be set to “1”.
: (PD) Power-down (Stop) Mode Enable (Default = 0).
For all resets except of POR, the value of POF is not changed if user sets it bit to “0”.
If BGS=0, band-gap block (LVD) will do not run in power-down mode, but run during
If user sets this bit to “1”, it causes the MCU to go into the power-down mode.
normal mode. It will support the significant power savings in power-down mode.
LVD_OFF
PCON.1
PD
LVD
EXIF.0
BGS
POR Pulse
Page 49 of 211
PCON.4
POF
DD
POR Reset
goes up and down as shown in