gc80c510 CORERIVER Semiconductor, gc80c510 Datasheet - Page 26

• Manufacturer Part Number: gc80c510
• Description: Eprom/rom 8-bit Turbo Microcontrollers
• Manufacturer: CORERIVER Semiconductor

6.1.3.1.3 Indirect Addressing Mode
6.1.3.1.4 Index Addressing Mode
6.1.3.1.5 Register Addressing Mode
6.1.3.1.6 Register-Specific Addressing Mode
content of either R0 or R1 (in the selected register bank) is used.
Note: The lower 128 bytes of the RAM can be addressed by using 8-bit addresses.
Examples:
addressing mode is intended for reading look-up tables in program memory. A 16-bit base register
(either DPTR or the PC) points to the base of the table, and the accumulator is set up with the table
entry number. The address of the table entry in program memory is formed by adding the accumulator
data to the base pointer. Another type of indexed addressing is used in the “case jump” instruction. In
this case, the destination address of a jump instruction is calculated as the sum of the base pointer and
the accumulator data.
Examples:
which carry a 3-bit register specification within the opcode of the instruction. Instructions that access the
registers this way are code efficient, since this mode eliminates an address byte. When the instruction
is executed, one of the eight registers in the selected bank is accessed. One of four banks is selected
at execution time by the two bank select bits (RS0 and RS1) in the PSW.
on the accumulator, or data pointer, etc., so no address byte is needed to point to it.
In indirect addressing mode, the operand is specified by an 8-bit that is stored in a register. And the
Only program memory can be accessed with indexed addressing, and it can only be read. This
The register banks, containing registers R0 through R7, can be accessed by certain instructions
Some instructions are specific to a certain register. For example, some instructions always operate
MOV A, @R0
MOVC A, @A + DPTR
MOVC A, @A + PC
JMP @A + DPTR
RAM is addressed by contents of R0 (8-bit address)
Address is the sum of DPTR and accumulator.
Address is the sum of PC and accumulator
Jump to sum of accumulator and DPTR
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Functional Description