gc80c510 CORERIVER Semiconductor, gc80c510 Datasheet - Page 56
gc80c510
Manufacturer Part Number
gc80c510
Description
Eprom/rom 8-bit Turbo Microcontrollers
Manufacturer
CORERIVER Semiconductor
Datasheet
1.GC80C510.pdf
(211 pages)
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6.2.4.1.3 Mode 1
6.2.4.1.4 Mode 2
6.2.4.1.5 Mode 3
is set to 1, then it will count 1 to 0 transitions on T0 (P3.4) for Timer 0.
overflow flag TF0 of the relevant timer is set and if enabled an interrupts will occur.
bit counter. This means that all the bits of TH0 and TL0 are used. Roll-over occurs when the timer
changes from FFFFh to 0000h. The timer overflow flag TF0 of the relevant timer is set and if enabled
an interrupt will occur. The selection of the time-base in the timer mode is similar to that in Mode 0. The
gate function operates similarly to that in Mode 0.
counter, while TH0 holds the reload value. When the TL0 register overflows from FFH to 00H, the TF0
bit in TCON is set and TL0 is reloaded with the contents of TH0, and the counting process continues
from reloaded value. The reload operation leaves the contents of the TH0 register unchanged. Counting
is enabled by the TR0 bit and proper setting of GATE and INT0B pins. As in the other two modes 0 and
1, Mode 2 allows counting of pulses on pin T0.
TL0 uses the Timer/Counter 0 control bits C/T, GATE, TR0, INT0B and TF0. The TL0 can be used to
count clock cycles (clock/12) or 1-to-0 transitions on pin T0 as determined by C/T (TMOD.2). TH0 is
forces as a clock cycle counter (clock/12) and takes over the use of TR1 and TF1 from Timer/Counter 1.
Mode 3 is used in cases where an extra 8-bit timer is needed. With Timer 0 in Mode 3, Timer 1 can still
be used in Modes 2. It can be used as a baud rate generator for the UART.
Figure 6-9
When the 13-bit counter reaches 1FFFh, the count will cause it to roll-over to 0000H. The timer
Mode 1 is similar to Mode 0 except that the counting register forms a 16-bit counter, rather than a 13-
In Mode 2, the Timer/Counter 0 is in the auto reload mode. In this mode, TL0 operates as an 8-bit
In the Mode 3, Timer/Counter 0 configures TL0 and TH0 as two separate 8-bit counters in this mode.
illustrates the various supported modes in Timer/Counter 0/1.
Time[sec]
Time[sec]
Time[sec]
=
Page 56 of 211
⎛
⎜
⎝
F
=
=
12
OSC
⎛
⎜
⎝
⎛
⎜
⎝
F
F
12
12
⎞
⎟
⎠
OSC
OSC
−
1
×
⎞
⎟
⎠
⎞
⎟
⎠
(
−
−
2
1
1
8
×
×
−
2
2
13
16
TH0
)
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